Simultaneous Register Retiming and Combinational Resynthesis
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Solution Overview
Problem
Traditional FPGA design flows face challenges in predicting delays and optimizing circuit performance due to the uncertainty of programmable routing network delays, leading to sub-optimal designs in terms of critical path performance and area requirements.
Innovation Solution
Simultaneous register retiming and combinational resynthesis are performed during physical synthesis, using a choice netlist that represents multiple retiming solutions with choice nodes, allowing for efficient storage and processing of alternative solutions, and enabling more accurate delay predictions and optimizations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional logic synthesis is performed early in the CAD flow, then the design can be optimized based on functional requirements, but the delays of routed connections cannot be predicted accurately
Solution Approach 1:
The patent performs physical synthesis operations (register retiming and combinational resynthesis) after placement but before routing completion. This preliminary action allows the design to be optimized with more accurate delay estimates from placement data, while still having time to adjust the design before final routing. The choice netlist is constructed early to represent multiple retiming solutions, enabling subsequent optimization based on improved delay predictions.
2Measurement precision
If physical synthesis is performed late in the CAD flow with accurate delay estimates, then routing delay optimization is improved, but the time available for optimization is reduced
Solution Approach 1:
The choice netlist representing multiple retiming solutions is constructed in advance during physical synthesis, before routing is completed. This preliminary construction allows the system to have multiple optimized solutions ready when routing delay estimates become available, enabling rapid selection of the best solution without time-consuming optimization iterations later in the flow.
Solution Approach 2:
The patent dynamically selects from multiple retiming solutions represented in the choice netlist based on actual routing delay measurements. The system adapts the design by choosing the optimal retiming configuration that best meets the actual timing constraints revealed during or after routing, rather than committing to a single static retiming decision made earlier.
3Adaptability or versatility
If multiple register retiming solutions are stored separately, then all possible solutions can be preserved, but the netlist size and processing complexity increase significantly
Solution Approach 1:
The patent merges multiple register retiming solutions into a single choice netlist structure. Instead of creating separate netlists for each retiming solution, the choice netlist combines them by representing different retiming options as alternative paths or choices within one unified netlist. This merging reduces the total number of netlists from N (one per solution) to 1, while preserving all retiming possibilities through choice nodes or similar constructs that allow the optimizer to select among alternatives.
Data Source
AI summary
A method for designing a system on a target device includes synthesizing the system. The system is mapped. The system is placed on the target device. Physical synthesis is performed on the system by identifying a plurality of register retiming solutions for each register in the system, performing combinational resynthesis on each of the register retiming solutions, and selecting a combinational resynthesis solution for the system.