Register Saving Optimization for Multi-OS Switching

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Solution Overview

Problem

Current virtualization technologies face limitations in switching between multiple operating systems on a single processor, particularly due to the inefficiency of saving and restoring registers, which slows down the process, especially when dealing with processors like ARM that have a large number of registers.

Innovation Solution

An information processing apparatus is designed with an instruction detector, switcher, save information manager, banked register determiner, saving register determiner, and register saver/restorer to optimize register saving and restoration by determining which registers need to be saved and restored based on mode switching and handler policy information, reducing the number of registers that need to be processed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all registers are saved and restored during OS switching, then data integrity is maintained, but switching speed decreases

Engineering Contradiction:
Improvedata integrityVSAvoidswitching speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent extracts only the necessary registers for saving and restoring during OS switching. By identifying and excluding registers that do not need to be preserved (such as banked registers that are automatically preserved by hardware or registers not used by the current OS), the system maintains data integrity for critical registers while significantly reducing the overall switching time.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies different saving strategies to different registers based on their specific characteristics. Critical registers that must be preserved are saved, while non-critical registers (such as banked registers or registers not used by the target OS) are excluded from saving. This localized approach ensures data integrity where needed while optimizing performance where it can be safely applied.

Inventive Principle:
Principle #3Local quality

2Loss of time

If the number of registers to be saved is reduced, then switching time decreases, but register management complexity increases

Engineering Contradiction:
Improveswitching timeVSAvoidregister management complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent performs preliminary determination of which registers need to be saved before the actual switching process. By pre-identifying the necessary registers based on OS configuration and register usage patterns, the system avoids the complexity of determining register requirements in real-time during switching, thus reducing switching time while managing complexity through advance preparation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent incorporates feedback mechanisms to track and learn from register usage patterns across different OS configurations. By monitoring which registers are actually accessed and saved, the system refines its determination of necessary registers over time, reducing management complexity through automated learning and optimization.

Inventive Principle:
Principle #23Feedback

3Reliability

If banked registers are always saved, then data safety is ensured, but processing efficiency decreases

Engineering Contradiction:
Improvedata safetyVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies selective saving to banked registers based on specific conditions. Instead of always saving all banked registers, the system determines whether each banked register needs to be saved based on the current OS configuration and usage patterns. This localized approach maintains data safety for banked registers that are actually used, while avoiding unnecessary saving operations that would reduce processing efficiency.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9354923B2Information processing apparatus, information processing method, and computer program product
Publication Date: 2016.05.31 KK TOSHIBA
  • US9354923B2 patent drawing
  • US9354923B2 patent drawing
  • US9354923B2 patent drawing

AI summary

According to an embodiment, an information processing apparatus includes a banked register determiner and a saving register determiner. The banked register determiner is configured to hold register information indicating which of a banked register and a non-banked register a register which is used by the operating system is, receive an acquisition instruction for the non-banked or banked register and the information about the mode of the operating system, and return a list of the non-banked or banked registers. The saving register determiner is configured to acquire the mode in which the operating system is capable of operating, determine that saving of the banked register for the mode is necessary when another operating system is capable of operating in the mode, acquire a list of the banked registers, and acquire a list of the non-banked registers from the banked register determiner.