Regulator Circuit With Substrate Potential Control
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Solution Overview
Problem
The existing regulator circuits face challenges in reducing the threshold voltage of NMOS transistors due to substrate effects, leading to decreased current capacity and difficulty in adapting to lower power supply voltages, while also requiring large phase compensation capacitors that are hard to integrate in semiconductor circuits and experiencing rush currents upon power-on.
Innovation Solution
The regulator circuit employs a depression NMOS transistor with substrate potential control to minimize the substrate effect on threshold voltage, uses a phase compensation circuit with reduced capacitance to prevent oscillation, and incorporates a clamping circuit between the gate and source to manage rush currents, allowing for efficient current supply and integration in semiconductor devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If ground potential is applied to the substrate of the depression NMOS transistor, then the transistor can operate with negative threshold voltage, but the substrate becomes reversely biased increasing the threshold voltage and reducing current capacity
Solution Approach 1:
The substrate potential is made dynamic rather than fixed at ground potential. The substrate potential control circuit adjusts the substrate potential according to the output voltage level, transitioning from a static ground connection to a dynamic potential that follows the output voltage, thereby preventing reverse bias while maintaining negative threshold voltage operation
Solution Approach 2:
A substrate potential control circuit is introduced as an intermediary between the ground and the substrate of the depression NMOS transistor. This control circuit generates an intermediate substrate potential that prevents reverse bias while allowing the transistor to maintain its negative threshold voltage characteristic, thus preserving current capacity
2Stability of the object's composition
If a large phase compensation capacitor is used to prevent oscillation, then the feedback loop stability improves, but the layout area increases making integration difficult
Solution Approach 1:
The invention changes the parameters of the phase compensation capacitor to achieve optimal performance with minimal area. By carefully selecting the capacitance value within a specific range (0.1pF to 1pF), the circuit achieves sufficient phase compensation and oscillation prevention without requiring large capacitor structures, enabling compact integration
3Use of energy by moving object
If the regulator circuit is designed for low voltage operation, then power consumption reduces, but rush currents occur upon power-on that can damage the circuit
Solution Approach 1:
The clamping circuit performs preliminary action by clamping the gate-source voltage to a predetermined level before the main regulation operation begins. This preliminary voltage limitation prevents excessive current flow during power-on transient, protecting the circuit from damage while enabling subsequent low-voltage operation
Data Source
AI summary
There is provided a regulator circuit capable of increasing the capacity of the output transistor for supplying current, stably generating an internal power supply voltage and adapting to the reduction of a power supply voltage. The regulator circuit includes an output transistor which is supplied with an external power supply voltage and supplies dropped voltage to an internal circuit, a differential amplifier for outputting a gate potential applied to the gate of the output transistor, a reference voltage generating circuit for supplying a reference voltage to the differential amplifier, and a cut-off transistor for turning off the output transistor to stop supplying power to the internal circuit. The output transistor is comprised of a depression NMOS transistor whose threshold voltage is a negative voltage. The regulator circuit further includes substrate potential control means for controlling the substrate potential of the depression NMOS transistor.