Regulator Mode-Switching Circuit for Fast LP-to-HP Transition

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Solution Overview

Problem

Current semiconductor devices and memory systems face challenges in improving processing capacity and power management, particularly in efficiently switching between low power (LP) and high power (HP) operation modes, which affects power consumption and data transfer performance.

Innovation Solution

A semiconductor device with a regulator that includes both LP and HP modes, featuring a mode switching circuit that applies terminal voltage to a capacitor during the LP mode to prevent delay in switching to the HP mode, thereby shortening the stabilization period and improving processing capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the regulator switches from LP mode to HP mode, then processing capacity is improved, but power consumption increases

Engineering Contradiction:
Improveprocessing capacityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The regulator dynamically switches between LP and HP modes based on operational requirements. The mode switching circuit enables the regulator to adapt its power consumption characteristics by changing operational states, allowing the system to optimize between low power consumption (LP mode) and high processing capacity (HP mode) as needed

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The regulator changes its operational parameters by switching between different modes. The mode switching circuit modifies key parameters such as bias currents and voltage levels to transition between LP and HP modes, enabling the system to adjust processing capacity and power consumption characteristics through parameter variation

Inventive Principle:
Principle #35Parameter changes

2Speed

If the regulator switches from LP mode to HP mode quickly, then data transfer performance is improved, but stabilization period increases

Engineering Contradiction:
Improvedata transfer performanceVSAvoidstabilization period
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The capacitor is pre-charged to the terminal voltage during LP mode operation. This preliminary action ensures that when switching to HP mode occurs, the capacitor is already prepared with the necessary voltage, eliminating delay and enabling immediate stabilization without extending the stabilization period

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The capacitor acts as an intermediary energy storage element between the power supply and the load. By maintaining the terminal voltage on the capacitor during LP mode and quickly transferring this energy during mode switching, the capacitor mediates the transition process, enabling rapid switching without prolonged stabilization time

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of energy

If power consumption is reduced in LP mode, then energy efficiency is improved, but switching delay to HP mode increases

Engineering Contradiction:
Improvepower consumptionVSAvoidswitching delay
Core Design Contradiction:
Loss of energyVSLoss of time

Solution Approach 1:

The capacitor continuously maintains the terminal voltage even during LP mode operation. This continuous useful action ensures that the voltage is always ready on the capacitor, eliminating any interruption or delay when switching to HP mode is required, thus maintaining energy efficiency while preventing switching delay

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces power consumption, enhances data transfer performance, and allows for rapid switching between operation modes, improving overall processing capacity and reliability of the semiconductor device and memory system.

Implementation Method 1

a capacitor including a first electrode connected to the output terminal; and a second circuit connected to a second electrode of the capacitor and configured to: (a) electrically disconnect the first circuit from the first capacitor and apply a second voltage to the first capacitor in the first operation mode

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11955185B2Semiconductor device and memory system
Publication Date: 2024.04.09 KIOXIA CORP
  • US11955185B2 patent drawing
  • US11955185B2 patent drawing
  • US11955185B2 patent drawing

AI summary

A semiconductor device includes a first transistor; a first resistor; a second resistor; a first circuit configured to apply a first voltage to the first transistor. The first voltage is based on a difference between a reference voltage and an output voltage divided by the first and second resistors. A first current through the first circuit in a first mode is less than a second current through the first circuit in a second mode. The semiconductor device includes a capacitor connected to the output terminal; and a second circuit connected to the capacitor that: (a) disconnects the first circuit from the capacitor and apply a second voltage to the capacitor in a first mode, and (b) electrically connects the first circuit to the capacitor in the second mode.