Regulator Mode-Switching Circuit for Fast LP-to-HP Voltage Stabilization
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Solution Overview
Problem
Current semiconductor devices and memory systems face challenges in efficiently switching between low power (LP) and high power (HP) operation modes, leading to prolonged stabilization periods and increased power consumption, which affects processing capacity and data transfer performance.
Innovation Solution
The implementation of a regulator with a mode switching circuit that applies terminal voltage in the HP mode during the LP mode, and a capacitor for phase compensation, allowing for rapid switching between LP and HP modes, thereby reducing stabilization time and improving processing capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a regulator switches from LP mode to HP mode, then processing capacity and data transfer performance are improved, but the stabilization period increases and power consumption increases
Solution Approach 1:
The capacitor is pre-charged to a voltage corresponding to the HP mode output voltage while the regulator is in LP mode. When switching to HP mode occurs, the capacitor is already charged to the appropriate voltage level, eliminating the stabilization delay that would normally be required to charge the capacitor during mode transition.
Solution Approach 2:
The capacitor serves dual functions: it acts as a filter capacitor during LP mode operation and as a pre-charged energy source during HP mode transitions. This multi-functionality allows the same component to support both low-power operation and rapid high-power activation without requiring separate circuitry for each mode.
2Productivity
If a regulator switches from LP mode to HP mode, then processing capacity and data transfer performance are improved, but power consumption increases
Solution Approach 1:
The capacitor is pre-charged to the HP mode output voltage during LP mode operation. This preliminary charging action stores energy in advance, so when HP mode is activated, the regulator can immediately draw from this pre-stored energy rather than consuming excessive power during a prolonged stabilization period.
3Productivity
If frequent mode shifts between LP and HP are implemented, then processing capacity is improved, but stabilization time accumulates and reliability decreases
Solution Approach 1:
The capacitor maintains a charge corresponding to the HP mode output voltage even during LP mode operation. This preliminary preparation ensures that regardless of how frequently mode shifts occur, the capacitor is always ready to immediately support HP mode activation without contributing to accumulated stabilization time or reducing system reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables faster switching between operation modes, reduces power consumption, and enhances data transfer performance by shortening the HP stabilization period and allowing for frequent mode shifts, thereby improving overall processing capacity and reliability.
Implementation Method 1
a capacitor including a first electrode connected to the output terminal
Implementation Method 2
a first resistor having a first end connected to the first transistor and the output terminal, and a second end connected to a second end of the first resistor and a second end connected to a ground voltage
Data Source
AI summary
A semiconductor device includes a first transistor; a first resistor; a second resistor; a first circuit configured to apply a first voltage to the first transistor. The first voltage is based on a difference between a reference voltage and an output voltage divided by the first and second resistors. A first current through the first circuit in a first mode is less than a second current through the first circuit in a second mode. The semiconductor device includes a capacitor connected to the output terminal; and a second circuit connected to the capacitor that: (a) disconnects the first circuit from the capacitor and apply a second voltage to the capacitor in a first mode, and (b) electrically connects the first circuit to the capacitor in the second mode.


