Regulator Circuit Resetting Ramp Signal to Compensate Voltage Sag
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional switching power supplies face challenges in regulating output voltage with fast response times while maintaining a constant switching frequency, leading to electromagnetic interference due to varying switching frequencies caused by hysteretic control circuits.
Innovation Solution
A method and circuit that reset a ramp signal and a clock signal in response to feedback signals, using differential comparators, an oscillator, and a latch to generate new control signals within a clock period, ensuring fast compensation for voltage sag without introducing electromagnetic noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a hysteretic control circuit is used to compensate for transient electrical signals, then the response time is improved, but the switching frequency becomes variable causing electromagnetic interference
Solution Approach 1:
The patent implements a feedback mechanism where the output voltage is continuously monitored and compared against a reference voltage. When the output voltage sags below the reference level, the feedback signal triggers an immediate reset of the ramp signal and clock signal, causing the control signal to be regenerated within the same clock period. This closed-loop feedback system enables fast compensation for transient electrical signals while maintaining a constant switching frequency, thereby resolving the contradiction between rapid response and electromagnetic interference reduction.
2Object-generated harmful factors
If the control signal waits for the next clock signal to compensate for voltage sag, then the switching frequency remains constant, but the response time increases
Solution Approach 1:
The patent employs preliminary action by preparing the ramp signal and clock signal in advance during the current clock period. When voltage sag is detected through the feedback mechanism, these pre-prepared signals are immediately reset and reused to generate a new control signal within the same clock period, rather than waiting for the next clock cycle. This preliminary preparation enables the system to respond to transient signals faster while maintaining constant switching frequency operation.
3Loss of time
If the control signal is regenerated within the same clock period, then the response time is improved, but the circuit complexity increases
Solution Approach 1:
The patent merges the voltage monitoring function, feedback signal generation, and control signal regeneration into a unified circuit architecture. The same oscillator that generates the clock signal also produces the ramp signal, and both signals share common reset logic triggered by the feedback mechanism. This consolidation of functions into integrated circuit blocks achieves fast response time while minimizing the increase in circuit complexity through efficient resource sharing and functional integration.
Data Source
AI summary
A regulator circuit and a method for compensating for sag in the output signal of the regulator circuit. A first comparator is coupled to an input of an oscillator, which oscillator outputs a clock signal and a ramp signal. In accordance with a feedback signal from the output of the regulator circuit, the clock and ramp signals of the oscillator are reset if the output signal sags to an undesirable level. The clock and ramp signals can be reset between active edges of the clock. The reset clock and ramp signals cause the regulator circuit to increase its output voltage to reduce the sag.