Relative Addressing for Nonvolatile RAM Bus Efficiency
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Solution Overview
Problem
Current semiconductor memory devices face challenges in enhancing bus efficiency while maintaining compatibility with conventional DRAM-based systems when using nonvolatile memory as a main memory.
Innovation Solution
A method for accessing nonvolatile RAM that involves receiving a base address and a relative address, using a relative address table to generate access locations, and transmitting these addresses to the nonvolatile RAM, allowing for efficient data reading and writing without the need for repeated active commands, thereby reducing bus occupancy and ensuring compatibility with DRAM protocols.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If nonvolatile memory is used as a main memory to replace DRAM, then memory nonvolatility and data retention are improved, but compatibility with conventional DRAM-based systems and bus efficiency deteriorate
Solution Approach 1:
The patent changes the addressing parameter from absolute addressing to relative addressing, where memory locations are accessed relative to a base address rather than using fixed absolute addresses. This parameter change enables nonvolatile memory to operate within conventional DRAM-compatible bus protocols while maintaining its nonvolatile characteristics, thus resolving the contradiction between memory stability and system adaptability
2Measurement precision
If absolute addressing is used for memory access, then address precision is maintained, but bus occupancy and access efficiency deteriorate
Solution Approach 1:
The patent segments the address into two parts: a base address that establishes a reference point and a relative address that specifies the offset from that base. This segmentation allows the system to maintain precise address identification while reducing the number of bits required on the bus for each access, thereby improving bus efficiency without sacrificing address precision
3Reliability
If repeated active commands are sent for memory access, then access reliability is ensured, but bus occupancy and access time increase
Solution Approach 1:
The patent implements preliminary action by establishing a base address that pre-defines a memory region, allowing subsequent relative addressing operations to proceed without requiring repeated active commands. This preliminary setup enables efficient sequential access to multiple locations within the defined region, reducing both bus occupancy and access time while maintaining reliable access through the structured addressing scheme
Data Source
AI summary
A method for accessing a random-accessible nonvolatile RAM includes externally receiving a base address, receiving a relative address corresponding to an increasing or decreasing size from the base address, and reading data stored in a memory area of the nonvolatile RAM or writing externally provided data into the nonvolatile RAM with reference to the base address and the relative address.