Relaxation Oscillator Using a Current-Controlled Delay Cell
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Solution Overview
Problem
Relaxation oscillators in switch-mode power converters face challenges due to comparator delay extending the switching period, decoupling the output clock from the intended RC time constant, and high static power consumption, which affects accuracy and power efficiency.
Innovation Solution
A low-power relaxation oscillator design utilizing a current-controlled delay cell (CCDC) embedded in the capacitor voltage swing regulation loop, replacing voltage-mode comparators with a transconductance-capacitor filter and current-controlled delay cell to stabilize frequency with low sensitivity to supply voltage variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If voltage-mode comparators are used in the relaxation oscillator, then the switching period can be detected and controlled, but the comparator delay extends the switching period and decouples the output clock from the intended RC time constant
Solution Approach 1:
The patent extracts and removes the voltage-mode comparator from the oscillator circuit, replacing it with a transconductance-capacitor filter and current-controlled delay cell. This extraction eliminates the comparator delay that was extending the switching period and decoupling the output clock from the RC time constant, while preserving the essential function of detecting and controlling the switching period through alternative means.
Solution Approach 2:
The patent substitutes the voltage-mode comparator (voltage comparison mechanism) with a transconductance-capacitor filter and current-controlled delay cell (current-mode mechanism). This substitution replaces the voltage-based detection system with a current-based system that does not suffer from the same delay issues, thereby resolving the contradiction between detection accuracy and time loss.
2Productivity
If voltage-mode comparators are used to control switching, then the oscillator can generate clock signals, but the comparators consume considerable static power
Solution Approach 1:
The patent substitutes the voltage-mode comparator with a current-mode implementation using transconductance-capacitor filters and current-controlled delay cells. This substitution dramatically reduces static power consumption while maintaining the clock signal generation function, as current-mode circuits can operate with lower power dissipation compared to their voltage-mode counterparts.
Solution Approach 2:
The patent changes the operating parameters of the oscillator by transitioning from voltage-mode to current-mode operation. This parameter change involves using transconductance (current-voltage conversion) instead of direct voltage comparison, which enables the circuit to achieve the same functional output with significantly reduced static power consumption.
3Ease of manufacture
If RC components are used for timing, then the oscillator can be fully-integrated in CMOS process, but process and temperature variations affect the accuracy
Solution Approach 1:
The patent implements a feedback mechanism where the transconductance-capacitor filter continuously monitors the oscillator output and adjusts the timing accordingly. This feedback loop compensates for process and temperature variations in the RC components, maintaining frequency accuracy while preserving the benefit of full CMOS integration.
Solution Approach 2:
The patent substitutes the direct dependence on RC component values with a current-controlled timing mechanism. By using transconductance-capacitor filters and current-controlled delay cells, the system reduces sensitivity to RC component variations caused by process and temperature changes, thereby improving frequency accuracy while maintaining CMOS compatibility.
Data Source
AI summary
According to embodiments of the present invention, an oscillator is provided. The oscillator includes a switched capacitor circuit arrangement configured to generate a predetermined voltage, a transconductance-capacitor filter configured to receive the predetermined voltage and a reference voltage, and to generate an output filter voltage based on a differential result between the predetermined voltage and the reference voltage, wherein a value of the output filter voltage is variable in response to the differential result, and a period control circuit arrangement configured to receive the output filter voltage, and further configured to generate an oscillator signal, wherein a period of the oscillator signal is variable in response to the value of the output filter voltage, wherein the oscillator is configured to control the switched capacitor circuit arrangement based on the oscillator signal to generate the predetermined voltage to be matched to the reference voltage.


