Discrete Relay Driver Circuit for Peak-and-Hold Relay Control

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Solution Overview

Problem

Existing vehicle systems lack a cost-effective solution for providing peak and hold functions in electromechanical relays, relying on separate driver integrated chips that increase design complexity and cost.

Innovation Solution

A discrete relay driver circuit comprising high and low side gate drive circuits, resistor dividers, and a current sensing amplifier, controlled by a microcontroller to manage voltage enable signals and power factor correction, enabling peak and hold operations with reduced resource and space requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate driver integrated chips are used for each relay, then reliable relay operation is achieved, but device complexity and cost increase

Engineering Contradiction:
Improverelay operation reliabilityVSAvoiddriver circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple relay driver functions into a single integrated driver circuit that can control multiple relays (first relay, second relay, third relay) simultaneously. This consolidation reduces the number of separate driver ICs needed while maintaining reliable operation of all relays through unified control logic and shared power management.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The driver circuit is designed with universal functionality to handle different relay types and operating conditions. It provides peak current boosting capability and hold current maintenance for various relay configurations, allowing a single circuit design to serve multiple relay driving needs across different vehicle systems.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Power

If separate driver integrated chips are used for each relay, then adequate current driving capability is provided, but design cost increases

Engineering Contradiction:
Improvecurrent driving capabilityVSAvoiddesign cost
Core Design Contradiction:
PowerVSEase of manufacture

Solution Approach 1:

The patent merges multiple driver functions into one cost-effective integrated circuit that provides sufficient current driving capability for all relays. The unified design eliminates the need for multiple expensive separate driver ICs while maintaining the ability to deliver peak and hold currents required by electromechanical relays.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The driver circuit uses efficient current replication and sharing mechanisms where a single power management unit can serve multiple relay loads. This allows the circuit to provide adequate current to multiple relays simultaneously without requiring proportionally more hardware, reducing overall design cost.

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides efficient peak and hold functions while reducing the need for multiple driver ICs, lowering design complexity and cost, and enhancing protection against overcurrent, short circuit, and voltage conditions.

Implementation Method 1

a first high side metal-oxide-semiconductor field-effect transistor (MOSFET) based on a first voltage enable signal

Methodology Applied
Scientific EffectField-effect transistor operation: Electric Field

Implementation Method 2

electromechanical relays that rely on a magnetic field generated from a current (e.g., associated with a control signal) being passed through a coil

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Data Source

PatentUS12088284B2Discrete relay driver circuit for peak and hold operation
Publication Date: 2024.09.10 BORGWARNER US TECHNOLOGIES LLC
  • US12088284B2 patent drawing
  • US12088284B2 patent drawing
  • US12088284B2 patent drawing

AI summary

A discrete relay driver circuit that includes a first high side gate drive circuit configured to drive a first high side MOSFET and a second high side gate drive circuit configured to drive a second high side MOSFET. The discrete relay driver circuit also includes a first resistor divider configured to sense voltage from the first high side MOSFET, a second resistor divider configured to sense voltage from the second high side MOSFET, and a first low side gate driver circuit configured to drive a first low side MOSFET. The discrete relay driver circuit also includes a second low side gate driver circuit configured to drive a second low side MOSFET based on a first low side enable signal, and a third low side gate driver circuit configured to drive a third low side MOSFET based on a second low side enable signal.