Relay State Retention During Processor Reset in Vehicle Control
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Solution Overview
Problem
Existing relay control systems fail to maintain a stable relay state during system errors, particularly in vehicles, which can lead to accidents and resource wastage due to unintended relay state changes.
Innovation Solution
A relay control apparatus comprising a processor, a monitor, and a relay state determiner that outputs control signals to maintain relay states even when the processor is reset, using a third control signal to determine the operation states of relays based on signal levels, ensuring the relays remain in a desired state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the processor is reset due to a system error, then the system can recover from the error, but the relay operation states are lost and relays may change to unintended states
Solution Approach 1:
The patent applies preliminary action by storing the relay operation states in a non-volatile memory (such as EEPROM or flash memory) before a processor reset occurs. This ensures that when the processor is reset, the relay states are already preserved and can be quickly restored without interruption, thus maintaining reliability while avoiding the need for complex real-time retention circuits.
Solution Approach 2:
The patent introduces an intermediary component (a separate memory device or register) that acts as a buffer between the processor and the relay control circuit. This intermediary stores the relay operation states independently of the processor, allowing the processor to be reset without affecting the stored state information. The relay control circuit then reads from this intermediary to restore the correct relay states, resolving the contradiction between reliability and complexity.
2Reliability
If additional circuits are added to retain relay states during processor reset, then relay state stability is improved, but the circuit complexity increases
Solution Approach 1:
The patent extracts the state storage function from the main processor system and places it in a separate, dedicated non-volatile memory component. This separation allows the relay state retention to be achieved with minimal additional circuitry, as the memory component handles state preservation independently. The processor can be reset without affecting the extracted state information, improving reliability while keeping the overall circuit structure relatively simple.
Solution Approach 2:
The patent uses inexpensive non-volatile memory components (such as EEPROM or flash memory cells) that can be easily programmed and read. These memory elements serve as disposable storage units that can be quickly written with relay states and then read back after a processor reset. Their low cost and simplicity allow state retention to be implemented without significantly increasing circuit complexity or system cost.
3Ease of operation
If the relay control system uses a simple processor reset mechanism, then the system is easy to operate, but the relay states cannot be maintained during reset
Solution Approach 1:
The patent implements self-service by enabling the relay control system to automatically preserve and restore its own operational states without external intervention. The non-volatile memory automatically stores the relay states before a processor reset, and the control circuit automatically retrieves and applies these states after reset. This self-service mechanism maintains reliability while keeping the operation simple, as no additional manual steps are required from the user.
Solution Approach 2:
The patent employs feedback by continuously monitoring the processor reset status and automatically triggering the state retention and restoration process. When a processor reset is detected, the system feedback mechanism activates the memory storage function, and after reset completion, it triggers the state restoration. This automatic feedback loop ensures relay state maintenance during reset operations while keeping the user interface simple and requiring no additional operational steps.
Data Source
AI summary
A relay control apparatus and method is capable of retaining the operation state of a plurality of relays even when a processor is reset due to a system error. Therefore, the relay control apparatus and method has an advantage of preventing an accident caused by the reset of the processor since the operation state of a plurality of relays is maintained even when the processor is reset. In addition, if the operation state of the processor is a reset state even after a predetermined time passes, the operation state of the plurality of relays is changed to a turn-off state, and thus there is an advantage of preventing system resources and energy from being wasted.