Remote Accelerator Command Submission via PCIe Host Bridge
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Solution Overview
Problem
Existing systems with remote PCIe-attached accelerators require different programming models for local and remote accelerators, introducing overhead as software on the host device cannot directly access remote acceleration engines without management software intervention.
Innovation Solution
The accelerator emulation mechanism allows direct engagement of remotely located acceleration engines by submitting co-processor commands across a PCIe link, using a common programming model for both local and remote accelerators, with a structure including a marker trace tag, control flags, source and target data descriptor entries, and a co-processor completion block, enabling seamless communication and task offloading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If management software intervention is used to access remote acceleration engines, then system compatibility and control are maintained, but software overhead increases and direct access is prevented
Solution Approach 1:
The patent creates a universal command structure format that can be used for both local and remote acceleration engines. The accelerator command structure includes fields such as command type, data descriptors, and control flags that provide a common interface regardless of whether the target engine is local or remote, eliminating the need for separate programming models.
Solution Approach 2:
The host bridge acts as an intermediary between the host device and remote acceleration engines. It receives accelerator commands from the host, manages the PCIe link communication, and forwards commands to the appropriate remote engine, thereby enabling direct access while maintaining system control without requiring complex management software intervention.
2Productivity
If separate programming models are used for local and remote accelerators, then specific optimization for each type is achieved, but software overhead and complexity increase
Solution Approach 1:
The patent implements a unified programming model where the same accelerator command structure and submission process work for both local and remote acceleration engines. This universality eliminates the software overhead associated with maintaining separate programming models while preserving the ability to efficiently execute commands on different engine types through the common interface.
3Speed
If direct engagement of remote acceleration engines is enabled, then access speed and efficiency improve, but communication protocol complexity over PCIe link increases
Solution Approach 1:
The patent segments the communication protocol into distinct, well-defined fields within the accelerator command structure. Each field serves a specific function (command type, data descriptors, control flags, status areas), allowing for efficient parsing and processing while maintaining clarity. This segmentation simplifies the overall protocol complexity by breaking it into manageable, standardized components.
Data Source
AI summary
An apparatus and method of submitting hardware accelerator engine commands over an interconnect link such as a PCI Express (PCIe) link. In one embodiment, the mechanism is implemented inside a PCIe Host Bridge which is integrated into a host IC or chipset. The mechanism provides an interface compatible with other integrated accelerators thereby eliminating the overhead of maintaining different programming models for local and remote accelerators. Co-processor requests issued by threads requesting a service (client threads) targeting a remote accelerator are queued and sent to a PCIe adapter and remote accelerator engine over a PCIe link. The remote accelerator engine performs the requested processing task, delivers results back to host memory and the PCIe Host Bridge performs a co-processor request completion sequence (status update, write to flag, interrupt) included in the co-processor command.