Remote AMO Execution for Contended Cache Lines
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Solution Overview
Problem
In shared memory multiprocessor systems, atomic memory operations (AMOs) on contended cache lines experience performance degradation due to the 'ping-pong' effect, where a cache line is repeatedly requested and invalidated between multiple caches.
Innovation Solution
The proposed solution involves a processing system that requests a cache line for an AMO instruction from a lower level memory structure, determines the availability of the cache line, and if it's contended, sends the AMO instruction to the lower level memory structure for remote execution, thereby avoiding local execution and reducing contention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a cache line is requested for AMO execution from a lower level memory structure, then the AMO operation can be executed, but another cache may request the same cache line during the delay period, causing the cache line to bounce between caches and reducing performance
Solution Approach 1:
The patent applies preliminary action by having the local cache proactively send the AMO instruction to the lower level memory structure before the cache line is fully obtained or before contention occurs. This allows the AMO operation to be prepared and executed remotely in advance, eliminating the performance penalty of cache line bouncing while maintaining correct execution semantics.
2Speed
If the cache line is kept in the local cache for AMO execution, then execution speed is improved, but cache coherence protocols require the cache line to be invalidated or upgraded, causing contention with other caches
Solution Approach 1:
The patent extracts the AMO instruction execution from the local cache by forwarding it to the lower level memory structure. This removes the cache line from the contention path while allowing the AMO operation to complete, effectively taking out the problematic element (the cache line) from the system during the critical execution window.
3Reliability
If the cache line bounces between multiple caches due to contention, then coherence protocols are maintained, but performance degradation occurs due to repeated invalidation and re-fetching
Solution Approach 1:
The lower level memory structure acts as an intermediary that receives and executes the AMO instruction remotely. This mediator handles the operation without requiring the cache line to physically move between caches, thus maintaining coherence reliability while eliminating the performance degradation caused by cache line bouncing.
Data Source
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AI summary
Described are methods and a system for atomic memory operations with contended cache lines. A processing system includes at least two cores, each core having a local cache, and a lower level cache in communication with each local cache. One local cache configured to request a cache line to execute an atomic memory operation (AMO) instruction, receive the cache line via the lower level cache, receive a probe downgrade due to other local cache requesting the cache line prior to execution of the AMO, and send the AMO instruction to the lower level cache for remote execution in response to the probe downgrade.