Remote FPGA Processing via Fabric Controller for Low-Latency Kernels

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Solution Overview

Problem

Existing FPGA programming methods through processors increase latency in low-latency data processing applications, such as autonomous cars and financial trading, due to the need for processor intervention.

Innovation Solution

Implementing a fabric controller that allows direct programming and management of FPGAs across a network fabric, eliminating processor intervention and enabling remote FPGA access as a pooled resource for distributed processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If FPGA programming is performed through a processor, then the programming can be managed and controlled, but the latency increases due to processor intervention

Engineering Contradiction:
ImproveFPGA programming controlVSAvoidProgramming latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the FPGA programming function from the processor by introducing a dedicated fabric controller. This separate controller handles all FPGA programming and management tasks independently, removing the bottleneck of processor intervention and enabling direct programming operations that reduce latency while maintaining reliable control through the specialized controller architecture.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The fabric controller serves as an intermediary component between the processor and the FPGA. It mediates programming operations by receiving instructions from the processor and directly programming the FPGA without requiring continuous processor intervention, thus reducing latency while preserving the management and control functions that processors provide.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If FPGAs are distributed across multiple computing nodes, then resource pooling and adaptability improve, but system complexity increases

Engineering Contradiction:
ImproveFPGA resource poolingVSAvoidNetwork fabric management
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The fabric controller is designed as a universal component that can manage multiple FPGAs across different computing nodes through the network fabric. It provides multi-functional capabilities including programming, configuration, and resource allocation for distributed FPGAs, enabling resource pooling and adaptability while the standardized controller architecture helps manage the inherent system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If direct FPGA programming is implemented without processor intervention, then latency is reduced, but programming control and management become more difficult

Engineering Contradiction:
ImproveProgramming speedVSAvoidFPGA programming management
Core Design Contradiction:
SpeedVSEase of operation

Solution Approach 1:

The fabric controller acts as an intermediary that enables direct programming operations at high speed while simultaneously providing the management and control interfaces needed for ease of operation. It handles the complex programming tasks directly to achieve low latency, while presenting simplified control mechanisms to users and systems that need to manage the FPGAs.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The fabric controller is designed to autonomously handle FPGA programming operations without requiring continuous processor intervention. It can independently manage programming tasks, configuration updates, and resource allocation, thereby achieving fast direct programming while maintaining self-service capabilities that simplify overall system management.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11029659B2Method and apparatus for remote field programmable gate array processing
Publication Date: 2021.06.08 INTEL CORP
  • US11029659B2 patent drawing
  • US11029659B2 patent drawing
  • US11029659B2 patent drawing

AI summary

In one embodiment, an apparatus comprises a fabric controller of a first computing node. The fabric controller is to receive, from a second computing node via a network fabric that couples the first computing node to the second computing node, a request to execute a kernel on a field-programmable gate array (FPGA) of the first computing node; instruct the FPGA to execute the kernel; and send a result of the execution of the kernel to the second computing node via the network fabric.