Remote Memory Store Synchronization With Embedded Metadata

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Solution Overview

Problem

Existing techniques for remote memory operations in multiprocessor systems suffer from significant latency and inefficiency due to the use of low-performance interconnects and the need for explicit memory synchronization operations, which are costly and complex, especially when transferring small data segments.

Innovation Solution

The method involves merging a memory store operation with a synchronization operation to create a self-synchronizing memory store operation, which is transmitted as a single unit and split at a point of consistency near the destination, allowing the memory operation to execute before the synchronization operation, thereby reducing network latency and bandwidth overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If explicit memory synchronization operations are used for remote memory operations, then data consistency between processing units is ensured, but network latency and bandwidth overhead increase significantly

Engineering Contradiction:
Improvedata consistencyVSAvoidnetwork latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the memory store operation and synchronization operation into a single self-synchronizing memory store operation. This combines data transfer and synchronization into one atomic operation, eliminating the need for separate synchronization messages and reducing network latency while ensuring data consistency between processing units.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The synchronization information is embedded within the memory store operation itself before transmission. The destination processing unit can extract and process the synchronization information along with the data in a single receive operation, performing preliminary synchronization action without waiting for separate synchronization messages.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If separate synchronization operations are transmitted over the interconnect, then synchronization is achieved, but network bandwidth overhead and complexity increase

Engineering Contradiction:
ImprovesynchronizationVSAvoidnetwork bandwidth overhead
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent combines the memory data and synchronization information into a single self-synchronizing memory store operation. This merging eliminates the need for separate synchronization messages, reducing network bandwidth overhead while maintaining reliable synchronization between processing units.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The self-synchronizing memory store operation serves multiple functions simultaneously: it transfers data from source to destination, embeds synchronization information, and enables the destination to update synchronization objects. This multi-functionality reduces the quantity of network traffic required while achieving comprehensive synchronization.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If traditional memory synchronization operations are used, then all participating threads can see memory operations at a given scope, but the number of operations over the interconnect increases

Engineering Contradiction:
Improvememory visibilityVSAvoidnumber of operations
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the memory store operation with synchronization operations into a single self-synchronizing memory store operation. This reduces the number of separate operations that must be transmitted over the interconnect while ensuring that all participating threads can still see the memory operations at the required scope through embedded synchronization information.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20260086804A1Self-synchronizing remote memory operations in a data center or multiprocessor system
Publication Date: 2026.03.26 NVIDIA CORP
  • US20260086804A1 patent drawing
  • US20260086804A1 patent drawing
  • US20260086804A1 patent drawing

AI summary

Various embodiments include techniques for performing self-synchronizing remote memory operations in a data center or multiprocessor computing system. During a remote memory operation, a source processor transmits multiple data segments to a destination processor. For each data segment, the source processor transmits a remote memory operation to the destination processor that includes associated metadata that identifies the memory location of a corresponding synchronization object representing a count of data segments to be stored or a flag for each data segment to be stored. The remote memory operation along with the metadata is transmitted as a single unit to the destination processor. The destination processor splits the operation into the remote memory operation and the memory synchronization operation. As a result, the source processor avoids the need to perform a separate memory synchronization operation, thereby reducing inter-processor communications and increasing performance of remote memory operations.