Remote Memory Integrity Verifier with Timing Feedback

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional methods for verifying the integrity of remote device memory are inadequate as they can be bypassed by malicious code, and they only check integrity during boot-up or for software stored in memory, lacking a secure mechanism for real-time verification across the network.

Innovation Solution

A system and method that remotely verifies memory integrity by generating a local check code using random numbers filled into free memory areas, comparing it with a remote check code generated by the device, and measuring the check code generation time to confirm integrity, using a verifier connected via a network.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional hash value methods are used to verify memory integrity, then verification can be conducted remotely, but the verification can be bypassed by malicious code attacking memory locations

Engineering Contradiction:
Improvememory integrity verification reliabilityVSAvoidmalicious code attack vulnerability
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The verifier pre-generates check codes and stores them in the verifier's memory before the integrity verification process. These check codes are derived from known good memory states and are used to compare against actual memory contents during verification, preventing malicious code from intercepting or altering verification data

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary verification mechanism where the verifier generates check codes based on memory filling maps and random numbers, then compares these with check codes generated by the device under test. This intermediary process prevents direct attacks on memory locations by using a trusted verification channel

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If digest value methods are used to check software integrity, then software stored in memory can be verified, but verification is limited only to stored software and cannot verify runtime memory

Engineering Contradiction:
Improvesoftware integrity verificationVSAvoidverification scope limitation
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The verification system is designed to handle multiple verification scenarios universally. It can verify software stored in memory, runtime memory contents, and even detect unauthorized modifications to the verification process itself. The check code generation mechanism works with any memory region defined in the memory filling map, making the system versatile across different verification needs

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If PROM signature checking is performed during boot-up, then internal integrity can be confirmed, but external verification is required and attackers can alter PROM contents to generate valid check codes

Engineering Contradiction:
Improveboot-up integrity confirmationVSAvoidPROM content alteration attack
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent moves verification from a single dimension (PROM signature during boot-up) to multiple dimensions. It verifies not only the boot-up state but also runtime memory states, and verifies the verification process itself by checking that check codes are generated within expected timeframes. This multi-dimensional approach prevents attackers from compromising a single verification point

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Reliability

If remote verification is implemented over network, then external integrity checking is possible, but verification time cannot be accurately measured and controlled

Engineering Contradiction:
Improveremote memory integrity verificationVSAvoidverification time measurement accuracy
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The device under test provides feedback about check code generation timing to the verifier. The verifier measures the time taken to generate check codes and compares it against expected time ranges. This feedback mechanism allows the verifier to detect tampering - if malicious code is present, it will either slow down check code generation or cause timing anomalies, which the verifier can detect through this timing feedback

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7444561B2Verifier for remotely verifying integrity of memory and method thereof
Publication Date: 2008.10.28 SAMSUNG ELECTRONICS CO LTD
  • US7444561B2 patent drawing
  • US7444561B2 patent drawing
  • US7444561B2 patent drawing

AI summary

A verifier for remotely checking integrity of a device connected via a network, includes a calculator which fills free areas in a memory of the device with random numbers and generates a local check code; an interface which transmits integrity check parameters that are used by the device to generate a remote check code, to the device, and receiving the remote check code from the device; a determiner which detects a remote check code generation time and compares the detected remote check code generation time with a presorted remote check code generation expectation time; and a controller which confirms the integrity of the memory of the device when the remote check code generation time does not exceed the remote check code generation expectation time according to a result of the determination and the local check code matches the remote check code.