Removable Probe Pads for Flat Hybrid Bonding Surfaces

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Solution Overview

Problem

The formation of probe marks on semiconductor chip probe pads during testing impairs the flatness of the bonding surface, which is essential for hybrid bonding, leading to challenges in achieving the required flatness for effective hybrid bonding.

Innovation Solution

A method is described where the probe pad is removed after testing, and the pad electrode and interlayer insulating film are formed to be substantially coplanar, ensuring high flatness and minimizing exposure to the atmosphere, thus reducing corrosion and allowing for hybrid bonding without additional test processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If probe pads are used for testing semiconductor chips, then testing can be performed, but probe marks are formed on the probe pads which impair the flatness of the bonding surface

Engineering Contradiction:
Improvetesting capabilityVSAvoidbonding surface flatness
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The bonding surface is divided into two distinct regions: a probe pad region for testing and a bonding region for hybrid bonding. This segmentation allows the probe pad to be located at a specific position where it will not interfere with the bonding surface flatness, enabling both testing and high-precision bonding to coexist.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the bonding surface are given different functions and properties. The probe pad region is designed to accept probing operations, while the bonding region maintains high flatness for hybrid bonding. This local differentiation allows each region to optimize its specific function without compromising the other.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If the bonding surface is made flat for hybrid bonding, then hybrid bonding can be enabled, but probe marks formed during testing impair this flatness

Engineering Contradiction:
Improvehybrid bonding capabilityVSAvoidbonding surface flatness
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The bonding surface is segmented into a probe pad region and a bonding region, allowing the bonding region to maintain the required flatness for hybrid bonding while the probe pad region accommodates testing operations without compromising overall bonding surface quality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The probe pad is positioned and configured in advance during the manufacturing process, before hybrid bonding occurs. This preliminary arrangement ensures that the probe pad will not interfere with the bonding surface flatness when hybrid bonding is performed later.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If probe pads are removed after testing, then bonding surface flatness is improved, but additional process steps are required

Engineering Contradiction:
Improvebonding surface flatnessVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The probe pad is positioned and configured in advance during the manufacturing process, before hybrid bonding occurs. This preliminary arrangement ensures that the probe pad will not interfere with the bonding surface flatness when hybrid bonding is performed later, eliminating the need for post-testing removal steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The probe pad is designed with specific local properties and positioning that allow it to be selectively removed only from the bonding region after testing, while preserving the bonding surface flatness. This localized approach minimizes the impact on the overall manufacturing process.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12051631B2Stacked semiconductor device with removable probe pads
Publication Date: 2024.07.30 MICRON TECHNOLOGY INC
  • US12051631B2 patent drawing
  • US12051631B2 patent drawing
  • US12051631B2 patent drawing

AI summary

Disclosed herein is a method that includes forming a contact plug to be embedded in a first insulating film formed on a semiconductor substrate; forming a probe pad on the first insulating film to contact with the contact plug; performing a test operation by probing the probe pad; removing the probe pad; forming a second insulating film to cover the contact plug after removing the probe pad; and forming a pad electrode to be embedded in the second insulating film.