Removable Synaptic Weight Storage for Neuro-Processor Flexibility
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Solution Overview
Problem
The integration of synaptic weights into a neuro-processor chip limits its functionality and flexibility, restricts the choice of non-volatile memory types, and increases the chip's area and implementation cost.
Innovation Solution
Implementing a removable memory external to the neuro-processor chip to store synaptic weights, allowing for diverse functionalities and efficient die utilization, with the option to connect different removable memories to replicate processor functions without retraining.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If synaptic weights are stored in on-chip non-volatile memory, then processor functionality is preserved after power down, but neuro-processor flexibility and functionality are limited
Solution Approach 1:
The patent divides the neuro-processor system into two separate components: a fixed neuro-processor chip and a separate removable memory module. This segmentation allows the processor to maintain its core functionality while the memory can be independently changed to provide different synaptic weight configurations, thereby resolving the contradiction between reliability and flexibility.
Solution Approach 2:
The patent extracts the synaptic weight storage function from the neuro-processor chip itself and places it in a separate removable memory module. This extraction allows the processor to remain flexible and reconfigurable while the memory provides persistent storage, resolving the contradiction by separating the two conflicting requirements into different components.
2Reliability
If on-chip synaptic memory is implemented, then processor functionality is maintained, but chip area and implementation cost increase
Solution Approach 1:
The patent removes the synaptic memory from the neuro-processor chip and places it in a separate removable memory module. This extraction significantly reduces the chip area required for the neuro-processor while maintaining the ability to preserve functionality through the separate memory component that stores synaptic weights.
Solution Approach 2:
By segmenting the system into a compact neuro-processor chip and a separate memory module, the patent reduces the area burden on the processor chip itself while maintaining functionality through the distributed memory component.
3Reliability
If on-chip non-volatile memory is used, then synaptic weights are preserved, but choices for memory type are limited
Solution Approach 1:
The removable memory module serves multiple functions: it provides non-volatile storage for synaptic weights, allows for different memory technology types (SRAM, DRAM, Flash, etc.), and enables reconfigurability of the neuro-processor. This multi-functionality resolves the contradiction by making the memory component versatile while maintaining weight preservation.
Solution Approach 2:
By extracting the memory function from the processor chip, the patent enables the use of various memory technologies in the removable module without constraining the processor design, thereby providing choices for memory type while maintaining synaptic weight preservation.
4Reliability
If synaptic memory is integrated on-chip, then functionality is preserved, but implementation cost increases
Solution Approach 1:
The patent extracts the memory component from the neuro-processor chip and implements it as a separate removable module. This separation reduces the complexity and cost of manufacturing the processor chip itself, while the memory module can be manufactured using standard memory fabrication processes, thereby reducing overall implementation cost while maintaining functionality preservation.
Solution Approach 2:
By segmenting the system into separately manufactured components (processor chip and memory module), the patent enables optimized manufacturing processes for each component using their respective standard fabrication techniques, reducing overall implementation cost compared to integrating both functions on a single expensive chip.
Data Source
AI summary
Certain embodiments of the present disclosure support techniques for storing synaptic weights separately from a neuro-processor chip into a replaceable storage. The replaceable synaptic memory gives a unique functionality to the neuro-processor and improves its flexibility for supporting a large variety of applications. In addition, the replaceable synaptic storage can provide more choices for the type of memory used, and might decrease the area and implementation cost of the overall neuro-processor chip.