Reordering Command Queue for Memory Power Optimization

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Solution Overview

Problem

Memory subsystems face inefficiencies in power management due to constant switching between normal and low power modes in memory modules, leading to minimal or increased power consumption, as read and write requests are executed in the order received, without optimal scheduling for power savings.

Innovation Solution

A reordering command queue in the memory controller that optimizes memory access scheduling by reordering commands based on rank and memory module numbers, using comparators and reordering logic to group accesses and manage power modes, ensuring that physically closer modules are accessed first and remain in a low power mode when not needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If memory accesses are executed in the order received at the memory controller queue, then the implementation is simple and maintains FIFO ordering, but memory modules constantly switch between normal and low power modes resulting in minimal or increased power consumption

Engineering Contradiction:
Improvepower consumptionVSAvoidmemory access scheduling
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by reordering memory access commands in advance before they are executed. The memory controller reorders read and write commands based on the target memory module addresses, grouping commands for the same memory module together. This preliminary reordering allows memory modules to enter low power mode between groups of accesses to the same module, rather than constantly switching modes during sequential command execution.

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If memory modules are placed in low power mode to save energy, then power consumption is reduced, but frequent switching between normal and low power modes minimizes or increases the power savings

Engineering Contradiction:
Improvepower savingsVSAvoidmode switching frequency
Core Design Contradiction:
Loss of energyVSLoss of time

Solution Approach 1:

The patent applies merging by combining multiple memory access commands destined for the same memory module into a single grouped sequence. By reordering the command queue to group commands for each memory module together, the system enables memory modules to remain in normal power mode only during their grouped access window and enter low power mode during intervals when no accesses are scheduled for them, thereby extending the duration of low power states and reducing overall mode switching frequency.

Inventive Principle:
Principle #5Merging (Combining)

3Use of energy by moving object

If read and write requests are executed in the order received, then the scheduling is simple and maintains request order integrity, but memory modules cannot remain in low power mode leading to increased power consumption

Engineering Contradiction:
Improvepower consumptionVSAvoidcommand execution ordering
Core Design Contradiction:
Use of energy by moving objectVSEase of operation

Solution Approach 1:

The patent applies preliminary action by reordering memory access commands in advance before they are executed. The memory controller reorders read and write commands based on the target memory module addresses, grouping commands for the same memory module together. This preliminary reordering allows memory modules to enter low power mode between groups of accesses to the same module, rather than constantly switching modes during sequential command execution.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary reordering buffer or queue between the incoming command stream and the memory module execution pipeline. This intermediary structure allows the system to decouple the incoming request order from the execution order, enabling commands to be reordered for power optimization while maintaining data integrity and eventual FIFO semantics at the output.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7721011B1Method and apparatus for reordering memory accesses to reduce power consumption in computer systems
Publication Date: 2010.05.18 ORACLE AMERICAN INC
  • US7721011B1 patent drawing
  • US7721011B1 patent drawing
  • US7721011B1 patent drawing

AI summary

A reordering command queue for reordering memory accesses in a computer system. The reordering command queue may reduce the power that is typically used up in computer systems when performing accesses to main memory by improving the scheduling of memory accesses with a pattern that is optimized for power and which has no (or negligible) impacting on performance. During a compare operation, the address corresponding to the command stored in each of one or more current storage locations of the reordering command queue may be compared to the address corresponding to the command stored in an adjacent storage location to determine whether the commands are in a desired order. In response to one or more of the commands not being in the desired order, a reordering operation may be performed, which may reorder each of the one or more commands from a current storage location to the adjacent storage location.