Re-ordered Motion Vector Buffer for GPU Video Decoding
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Solution Overview
Problem
Conventional video processing systems face inefficiencies and delays due to imbalanced workloads between IDCT and motion compensation operations, particularly with HEVC's increased prediction modes and block sizes, leading to stalled hardware and reduced processing efficiency in massively parallel processors like GPUs.
Innovation Solution
A software driver-based re-ordering mechanism for motion vectors is implemented, sorting vectors by prediction modes and storing them in a re-ordered motion vector buffer to ensure efficient processing and minimize overhead, allowing GPUs to process motion vectors associated with multiple prediction modes in a sorted order.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If motion compensation vectors are processed in conventional order without re-ordering, then the processing follows the natural decoding sequence, but hardware pipelines stall due to imbalanced workloads between IDCT and motion compensation operations
Solution Approach 1:
The patent applies preliminary action by re-ordering motion compensation vectors before processing to balance the workload between IDCT and motion compensation operations. The system performs a preliminary sorting operation that groups vectors by prediction mode and arranges them in an optimized sequence, ensuring that hardware pipelines receive a steady stream of both IDCT and motion compensation tasks without stalling. This preliminary re-ordering prevents pipeline idle time and maintains continuous processing.
2Adaptability or versatility
If GPUs process motion vectors associated with multiple prediction modes in random order, then all prediction modes are handled, but processing efficiency decreases due to workload imbalance and hardware stalling
Solution Approach 1:
The patent applies segmentation by dividing motion compensation vectors into separate groups based on prediction modes. The system segments vectors into categories such as intra prediction, inter prediction, and various inter prediction modes, then processes each segment in an optimized sequence. This segmentation allows the GPU to handle diverse prediction modes while maintaining workload balance and preventing hardware stalling by ensuring that no single operation type dominates the processing queue.
3Manufacturing precision
If HEVC's increased block sizes and prediction modes are implemented, then video coding efficiency is improved, but hardware pipeline stalling increases due to imbalanced IDCT and motion compensation workloads
Solution Approach 1:
The patent applies parameter changes by modifying the processing sequence parameter of motion compensation vectors. The system changes the order in which vectors are processed from the natural decoding sequence to an optimized sequence that balances workload. This parameter change affects how block sizes and prediction modes are handled, ensuring that larger HEVC blocks and multiple prediction modes are processed in a way that maintains pipeline utilization and reduces stalling delays.
Data Source
AI summary
A host processor, such as a central processing unit (CPU), programmed to execute a software driver that causes the host processor to generate a motion compensation command for a plurality of cores of a massively parallel processor, such as a graphics processing unit (GPU), to provide motion compensation for encoded video. The motion compensation command for the plurality of cores of the massively parallel processor contains executable instructions for processing a plurality of motion vectors grouped by a plurality of prediction modes from a re-ordered motion vector buffer by the plurality of cores of the massively parallel processor.