Repeat Instruction Reduces Program Memory for Extended Precision Arithmetic
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Solution Overview
Problem
Processors with narrower ALUs and data buses require excessive program memory to perform large arithmetic and logic operations, leading to increased costs and memory usage, while maintaining backward compatibility with existing instruction sets is desirable.
Innovation Solution
The introduction of a novel repeat instruction (RPT) that operates on operands without specifying their locations, relying on preceding instructions to determine the operation, allowing for extended precision operations with reduced program memory usage by assuming adjacent operand locations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple instructions are used to perform extended precision operations on a processor with narrow ALU, then the operations can be completed, but the program memory consumption increases significantly
Solution Approach 1:
The patent merges the functionality of multiple instructions (ADD, ADC, ADCH, ADCD) into a single RPT instruction that can perform extended precision addition operations. The RPT instruction combines the operations of adding lower bytes with carry and adding upper bytes with carry into one unified instruction that operates on multi-byte operands stored in adjacent memory locations, thereby reducing program memory consumption while maintaining the ability to perform extended precision arithmetic.
2Ease of operation
If explicit operand addressing is included in each instruction, then the instructions are complete and unambiguous, but the program memory usage increases
Solution Approach 1:
The RPT instruction employs self-service by automatically determining operand locations based on the instruction's own memory address. The processor derives the addresses of source and destination operands by calculating offsets from the RPT instruction's address, eliminating the need for explicit address fields in the instruction. This self-referential mechanism maintains operational clarity while minimizing program memory usage.
Solution Approach 2:
The patent establishes preliminary conventions about operand storage locations adjacent to the RPT instruction in memory. By pre-defining that operands are stored in specific adjacent memory locations relative to the instruction, the system eliminates the need to encode address information in each instruction, thereby reducing program memory consumption while maintaining unambiguous instruction execution.
3Measurement precision
If a processor has wider ALU and data bus, then extended precision operations can be performed directly, but the device complexity and cost increase
Solution Approach 1:
The patent segments extended precision operands into multiple separate memory locations (e.g., low byte and high byte stored in adjacent memory locations). The RPT instruction processes these segmented operands by performing multiple addition operations with carry propagation, effectively achieving extended precision arithmetic using the processor's existing narrow ALU without requiring a wider data bus or more complex hardware architecture.
Data Source
AI summary
A repeat instruction (RPT) operates on one or more operands, but the RPT instruction includes only an opcode and does not specify locations of the operand or operands. The type of operation to be performed when the RPT instruction is executed depends upon an initial instruction. If, for example, the initial instruction is an ADD, then the RPT instruction causes an ADC operation to be performed, thereby facilitating efficient coding of an extended precision addition operation. The locations of the operands for the RPT instruction are assumed to be in predetermined memory locations. When coding a repeated operation, rather than following the initial instruction with one or more instructions of the same form, the initial instruction is followed by one or more of the shorter RPT instructions, thereby conserving memory space and facilitating backward compatibility with an instruction set that does not have the RPT instruction.