Replacement Bottom Spacer for Vertical Transport FETs

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Solution Overview

Problem

Current bottom spacer fabrication processes for vertical field effect transistors (VTFETs) suffer from defects and feature-to-feature variations due to the immaturity of directional deposition processes, which complicates mass production and integration.

Innovation Solution

A replacement bottom spacer method is employed, involving the formation of sacrificial layers, trenches, and conformal deposition of insulating materials to create uniform spacers within cavities, improving spacer uniformity and reducing defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If directional deposition processes are used to form bottom spacers, then spacer formation is achieved, but defects and feature-to-feature variations occur due to process immaturity

Engineering Contradiction:
Improvespacer uniformityVSAvoiddefect rate
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by forming sacrificial layers and cavities before the actual spacer deposition. The sacrificial layers are deposited and patterned first, then cavities are formed by removing portions of these sacrificial layers. This preliminary structuring enables subsequent conformal spacer deposition to occur in controlled cavity spaces, ensuring uniform spacer formation without the defects associated with direct directional deposition on flat surfaces.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses sacrificial layers as intermediary structures to facilitate spacer formation. These sacrificial layers are deposited conformally, then partially removed to create cavities that serve as templates for the final spacer structure. The intermediary sacrificial structures enable precise spacer placement and uniform thickness while avoiding the reliability issues of direct deposition methods.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If complex sacrificial layer processes are used to improve spacer uniformity, then manufacturing precision improves, but process complexity increases

Engineering Contradiction:
Improvespacer uniformityVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the spacer formation process into distinct stages: forming first sacrificial layers, forming second sacrificial layers, creating cavities by selective removal, and then depositing spacers in the cavities. This segmentation allows each step to be optimized independently, achieving high spacer uniformity through controlled conformal deposition in cavity spaces rather than attempting complex single-step direct deposition.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses conformal deposition to create copies of the cavity geometry as the final spacer structure. The spacer material is deposited conformally on the cavity walls, creating a precise replica of the cavity shape and dimensions. This copying approach ensures uniform spacer thickness and geometry without requiring complex deposition control, as the cavity structure itself defines the spacer dimensions.

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the uniformity of VTFET bottom spacers, reducing defects and feature-to-feature variations, thereby improving the reliability and scalability of VTFET fabrication.

Implementation Method 1

the first sacrificial layer is selectively removed to form a cavity under the second sacrificial layer

Methodology Applied
Scientific EffectSelective removal:

Implementation Method 2

conformal deposition of insulating materials to create uniform spacers within cavities

Methodology Applied
Scientific EffectConformal deposition: Deposition (physical)

Data Source

PatentUS11239119B2Replacement bottom spacer for vertical transport field effect transistors
Publication Date: 2022.02.01 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11239119B2 patent drawing
  • US11239119B2 patent drawing
  • US11239119B2 patent drawing

AI summary

A method of forming a vertical channel semiconductor structure, comprises forming a source/drain layer in contact with at least one semiconductor fin. A first sacrificial layer is formed over the source/drain layer. A second sacrificial layer is formed over the first sacrificial layer. A trench is formed in the second sacrificial layer to expose a portion of the first sacrificial layer. After forming the second sacrificial layer, the first sacrificial layer is selectively removed to form a cavity under the second sacrificial layer. A spacer layer is then formed within the cavity.