Replacement Buried Source Line in 3D Memory Stacks

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Solution Overview

Problem

Current three-dimensional memory devices face challenges in efficiently forming electrical connections between vertical semiconductor channels and common source regions, particularly in providing inexpensive and efficient methods for these connections using replacement buried source layers.

Innovation Solution

The implementation of a method involving semiconductor pillar structures, alternating stacks of insulating and electrically conductive layers, and a source-level semiconductor material layer that contacts the bottom end portions of vertical semiconductor channels, allowing for the formation of memory stack structures with a common source region and efficient electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional methods are used to form electrical connections between vertical semiconductor channels and source regions, then manufacturing complexity is reduced, but electrical connectivity and device performance deteriorate

Engineering Contradiction:

Improveelectrical connectivityVSAvoidmanufacturing complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming the source-level sacrificial layer before forming the alternating stack of insulating and conductive layers. This sacrificial layer is subsequently removed to create the source region, allowing electrical connections to be established in advance during the manufacturing process rather than requiring complex post-processing steps.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent uses a source-level sacrificial layer as an intermediary element that facilitates the formation of the source region. This sacrificial layer is temporarily introduced, serves as a placeholder during manufacturing, and is then removed to create the final source structure, simplifying the overall manufacturing process while ensuring proper electrical connectivity.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If replacement buried source layers are implemented, then device performance and electrical connectivity improve, but manufacturing process complexity increases

Engineering Contradiction:

Improvedevice efficiencyVSAvoidmanufacturing process simplicity

Core Design Contradiction:

ProductivityVSEase of manufacture

Solution Approach 1:

The patent merges the formation of the source region with the existing alternating stack structure. The source-level sacrificial layer is formed at the same level as the insulating and conductive layers, and its removal creates the source region in conjunction with the memory stack structures, combining multiple functions into a unified manufacturing approach.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a new dimensional approach by forming the source region at a specific vertical level within the alternating stack structure. The source-level sacrificial layer is positioned at a particular height, and its removal creates a three-dimensional source region that laterally surrounds the semiconductor pillar structures, adding vertical dimensionality to the source formation process.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Reliability

If source-level sacrificial layers are used and subsequently removed, then electrical connections are improved, but manufacturing time and process steps increase

Engineering Contradiction:

Improveelectrical connection qualityVSAvoidmanufacturing cycle time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The source-level sacrificial layer is formed in advance during the alternating stack formation process, before the memory stack structures are completely fabricated. This preliminary action allows the source region to be prepared early in the manufacturing sequence, and its subsequent removal occurs at an optimized point in the process, minimizing overall manufacturing cycle time.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The sacrificial layer serves as a temporary intermediary that enables efficient process sequencing. By introducing this intermediate element, the manufacturing process can follow a logical sequence: form sacrificial layer, form alternating stack, remove sacrificial layer, then complete memory stack formation. This sequencing optimizes the overall manufacturing timeline compared to alternative approaches.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS10797070B2Three-dimensional memory device containing a replacement buried source line and methods of making the same

Publication Date: 2020.10.06 SANDISK TECHNOLOGIES LLC

AI summary

An alternating stack of insulating layers and spacer material layers is formed over a source-level sacrificial layer overlying a substrate. The spacer material layers are formed as, or are subsequently replaced with, electrically conductive layers. Memory stack structures including a respective vertical semiconductor channel and a respective memory film are formed through the alternating stack. A source-level cavity is formed by removing the source-level sacrificial layer. Semiconductor pillar structures may be used to provide mechanical support to the alternating stack during formation of the source-level cavity. A source-level semiconductor material layer can be formed in the source-level cavity. The source-level semiconductor material layer adjoins bottom end portions of the vertical semiconductor channels and laterally surrounds the semiconductor pillar structures. The source-level semiconductor material layer may be electrically isolated from a substrate semiconductor material layer in the substrate by a series connection of two p-n junctions having opposite polarities.