Replacement Gate Cap Filling to Prevent Seams and Voids
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Solution Overview
Problem
The semiconductor industry faces challenges in processing and manufacturing as the complexity of integrated circuits (ICs) increases with smaller geometry sizes, requiring advancements in IC processing and manufacturing techniques.
Innovation Solution
The method involves forming fins on a semiconductor substrate, creating source/drain epitaxial structures, and replacing dummy gate structures with replacement gate structures, followed by non-conformal deposition processes to form gate cap and contact cap materials, which are planarized to ensure void-free and dense coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conformal deposition is used to form gate cap material, then the deposition process is simple and uniform, but seams and voids form at the interfaces between deposited material and existing structures
Solution Approach 1:
The patent inverts the conventional deposition approach by using non-conformal deposition that deliberately deposits material unevenly, with thicker regions at interfaces and thinner regions in centers. This inverted approach prevents seams and voids by ensuring complete interface coverage, trading uniformity for defect prevention.
Solution Approach 2:
The patent changes the deposition parameters from conformal (uniform thickness) to non-conformal (non-uniform thickness distribution). By controlling deposition conditions to create variable thickness profiles, the process achieves better interface coverage and eliminates seams while maintaining manufacturing feasibility.
2Productivity
If geometry size is reduced to increase functional density, then production efficiency increases and costs decrease, but processing complexity increases
Solution Approach 1:
The non-conformal deposition process is self-adjusting, automatically creating the desired thickness profile without requiring complex process control. The deposition parameters inherently produce thicker material at interfaces and thinner material in centers, eliminating the need for complex monitoring and adjustment mechanisms.
Solution Approach 2:
By changing from conformal to non-conformal deposition parameters, the process achieves better filling characteristics for scaled-down structures. This parameter change simplifies the overall processing by eliminating seam formation issues that would require additional corrective steps in smaller geometry devices.
3Reliability
If dummy gate structures are replaced with replacement gate structures, then device functionality is improved, but additional processing steps are required
Solution Approach 1:
The non-conformal deposition of gate cap material is performed as a preliminary action during the replacement gate formation process. By depositing the cap material with the appropriate non-uniform thickness profile early in the process, subsequent processing steps are simplified, and the overall device functionality is achieved more efficiently.
Solution Approach 2:
The deposition parameter change to non-conformal mode integrates the gate cap formation with the replacement gate structure fabrication. This parameter change allows the cap material to be deposited in a single step with the correct thickness distribution, avoiding the need for multiple separate deposition and planarization steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the yield and reliability of semiconductor devices by preventing unwanted seams and voids in the gate and contact cap materials, ensuring improved electrical contact and reduced manufacturing defects.
Implementation Method 1
perform a non-conformal deposition process to fill the recess with a gate cap material
Data Source
AI summary
A method of forming a semiconductor device includes forming a dummy gate structure across a fin protruding from a substrate, forming gate spacers on opposite sidewalls of the dummy gate structure, forming source/drain epitaxial structures on opposite sides of the dummy gate structure, forming a first interlayer dielectric (ILD) layer on the source/drain epitaxial structures and outer sidewalls of the gate spacers, replacing the dummy gate structure with a replacement gate structure, etching back the replacement gate structure to form a recess between the gate spacers, performing a first non-conformal deposition process to fill the recess with a first gate cap material, and planarizing the first gate cap material to remove a portion of the first gate cap material outside the recess.