Replacement Gate Fin Cutting for Stress-Retentive FinFETs

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Solution Overview

Problem

In the semiconductor industry, particularly in FinFET device fabrication, existing methods face challenges in maintaining stress in semiconductor fins during processing, leading to reduced performance and increased complexity due to stress relaxation and dimensional losses during gate and fin cutting processes.

Innovation Solution

The proposed solution involves cutting gate structures and fins after forming a replacement gate structure, which increases the process window and allows for stress retention in fins by avoiding stress relaxation, using a method that includes forming stressed semiconductor layers, patterning fins, and cutting gate structures with insulating fill structures to maintain fin stress and control dimensions accurately.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If gate structures and fins are cut during FinFET fabrication, then device density and integration are improved, but fin stress is relaxed and performance deteriorates

Engineering Contradiction:
Improvedevice densityVSAvoidfin stress retention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The method performs the fin cutting operation after the gate structure is already formed, rather than before. This preliminary action of forming the gate first allows the cutting process to occur in a controlled manner that preserves fin stress, thereby resolving the contradiction between achieving high device density through cutting and maintaining fin stress for device performance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The fabrication process is segmented into distinct stages: first forming the gate structure, then performing the cutting operation. This segmentation allows each process to be optimized independently, enabling the cutting to proceed in a way that maintains fin stress while still achieving the required device density

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If conventional cutting methods are used, then manufacturing simplicity is maintained, but dimensional precision is lost

Engineering Contradiction:
Improveprocess simplicityVSAvoidcritical dimension control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The gate structure is formed preliminarily before the cutting operation, establishing a reference framework that enables precise dimensional control during subsequent cutting. This preliminary gate formation allows for accurate critical dimension control while maintaining relative process simplicity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The gate structure serves as an intermediary reference during the cutting process, enabling precise dimensional control. The gate acts as a mediator that allows the cutting operation to achieve high precision without requiring complex cutting process equipment or methods

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If fins are cut early in the process, then process complexity is reduced, but stress relaxation occurs and performance decreases

Engineering Contradiction:
Improveprocess complexityVSAvoiddevice performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The gate structure is formed in advance before the cutting operation, creating a stable reference framework. This preliminary action allows the cutting to be performed with minimal additional process complexity while ensuring fin stress is maintained, thereby preserving device performance

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11894370B2Semiconductor structure cutting process and structures formed thereby
Publication Date: 2024.02.06 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11894370B2 patent drawing
  • US11894370B2 patent drawing
  • US11894370B2 patent drawing

AI summary

Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.