Replacement Gate Process for FinFET Void Elimination
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Solution Overview
Problem
In the semiconductor industry, the formation of FinFET devices faces challenges in reducing feature sizes and eliminating voids in gate electrode layers, which can lead to defects and increased resistance in metal gate structures due to the difficulty in depositing materials between shrinking fin distances.
Innovation Solution
A method is developed involving the formation of a dummy gate with a thinned lower portion, followed by the deposition of a gate fill material and spacers, and subsequent replacement with a metal gate, where the gate fill material fills voids and is removed in a controlled etching process to ensure uniformity and reduce leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature size is reduced to increase integration density, then more components can be integrated into a given area, but voids form in gate electrode layers leading to defects and increased resistance
Solution Approach 1:
A dummy gate structure is formed preliminarily over the fin structure before the actual metal gate formation. This dummy gate serves as a placeholder that enables subsequent processing steps to be performed uniformly across the wafer, preventing void formation in the final metal gate electrode layer.
Solution Approach 2:
The dummy gate acts as an intermediary structure between the fin and the final metal gate. It includes a dummy gate electrode and dummy gate dielectric that are temporarily formed, processed, and then removed to replace with the actual metal gate structure, thereby mediating the conflict between small feature size processing and uniform material deposition.
2Productivity
If feature size is reduced to increase integration density, then more components can be integrated into a given area, but defects and increased resistance occur in metal gate structures
Solution Approach 1:
The dummy gate structure is formed in advance to establish a uniform reference plane for subsequent gate fill material deposition. This preliminary structure ensures that when the metal gate is formed later, the material can be deposited uniformly without defects, even at reduced feature sizes.
Solution Approach 2:
The dummy gate is a simplified copy of the final metal gate structure, using different materials (polysilicon or silicon-germanium instead of metal) that are easier to process uniformly at small dimensions. This copy allows the fabrication process to proceed with uniformity, and the dummy gate is later replaced with the actual metal gate.
3Ease of manufacture
If conventional gate formation is used, then process is simpler, but voids in gate electrode lead to defects and increased resistance
Solution Approach 1:
The gate formation process is segmented into distinct phases: forming the dummy gate structure, depositing gate fill material over it, forming spacers, and then selectively removing the dummy gate and gate fill material before forming the final metal gate. This segmentation allows each step to be optimized independently, ensuring uniform metal gate formation without voids.
Solution Approach 2:
The dummy gate structure serves as a mediating element that enables the complex multi-step replacement gate process. It allows gate fill material to be deposited conformally, provides a structure for spacer formation, and is then removed to create the final metal gate cavity, thereby mediating between simple process steps and high-quality gate formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces defects and resistance in metal gate structures by filling voids in the gate electrode and increasing the distance between the metal gate and source/drain regions, thereby enhancing the performance and reliability of FinFET devices.
Implementation Method 1
performing an etching process, wherein a first etch rate of the protection layer for the etching process is slower than a second etch rate of the dummy gate for the etching process
Implementation Method 2
forming the metal gate in the opening
Data Source
AI summary
A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming isolation regions on opposing sides of the fin; forming a dummy gate over the fin; reducing a thickness of a lower portion of the dummy gate proximate to the isolation regions, where after reducing the thickness, a distance between opposing sidewalls of the lower portion of the dummy gate decreases as the dummy gate extends toward the isolation regions; after reducing the thickness, forming a gate fill material along at least the opposing sidewalls of the lower portion of the dummy gate; forming gate spacers along sidewalls of the dummy gate and along sidewalls of the gate fill material; and replacing the dummy gate with a metal gate.