Replacement Gate Structure to Reduce Seam Voids and Oxidation
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Solution Overview
Problem
As semiconductor devices continue to reduce minimum feature sizes for increased integration density, issues such as gate structure damage, seam void defects, oxidation of work function layers, threshold voltage shift, and gate dielectric leakage become significant challenges.
Innovation Solution
The development of a gate structure and method that avoids gate structure damage by using a gate-last process, reducing seam void defects, and minimizing oxidation of work function layers through specific manufacturing steps, including the formation of gate dielectric layers and electrodes, while employing epitaxial source/drain regions to enhance device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional gate processes are used, then manufacturing simplicity is maintained, but gate structure damage and seam void defects occur
Solution Approach 1:
The gate dielectric layer is formed on the semiconductor fin surface before the gate electrode is deposited, preparing the surface in advance to prevent damage and reduce seam void defects during subsequent processing steps
Solution Approach 2:
The gate structure is divided into distinct layers including gate dielectric layer, work function layer, and gate electrode layer, with each layer serving specific functions to improve overall reliability while managing process complexity
2Productivity
If minimum feature sizes are reduced for increased integration density, then integration density is improved, but gate dielectric leakage and threshold voltage shift increase
Solution Approach 1:
The gate structure uses composite materials including high-k gate dielectric layer combined with work function layer and gate electrode, providing superior electrical performance and reduced leakage at scaled dimensions
Solution Approach 2:
The gate dielectric layer is formed with specific thickness and material properties tailored to the local requirements of scaled transistors, optimizing performance for high integration density while preventing leakage and voltage shift
3Reliability
If work function layers are exposed to oxidation, then manufacturing simplicity is maintained, but threshold voltage shift occurs
Solution Approach 1:
A protective layer is formed over the work function layer before subsequent processing steps, preventing oxidation in advance and maintaining threshold voltage stability without requiring complex additional process steps
Solution Approach 2:
The work function layer is protected from oxidation by forming it in an inert or reducing atmosphere and maintaining protective conditions during subsequent processing, preventing threshold voltage shift
Data Source
AI summary
A semiconductor device and a method of forming the same are provided. A method includes forming a sacrificial gate over an active region of a substrate. The sacrificial gate is removed to form an opening. A gate dielectric layer is formed on sidewalls and a bottom of the opening. A first work function layer is formed over the gate dielectric layer in the opening. A first protective layer is formed over the first work function layer in the opening. A first etch process is performed to widen an upper portion of the opening. The opening is filled with a conductive material.