Replacement Gate Stack Seam Filling in Work-Function Layers

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Solution Overview

Problem

As semiconductor devices continue to shrink in feature size, the integration of transistors and other components becomes more challenging due to issues such as seam formation in gate stacks, which can affect the performance and reliability of transistors like Gate All-Around (GAA) transistors, leading to inefficiencies in semiconductor fabrication.

Innovation Solution

A method is developed to form a replacement gate stack using conformal deposition methods, including the formation of a silicon-containing seam-filling layer through a soaking process to fill seams in the work-function layer, enhancing the structure and performance of transistors like GAA transistors, and potentially applicable to other types such as FinFETs and planar transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conformal deposition methods are used to form gate stacks, then manufacturing precision is improved, but seam formation occurs in the gate electrodes

Engineering Contradiction:
Improvegate stack formation precisionVSAvoidseam formation in gate electrodes
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

A seam-filling layer is deposited beforehand to fill seams in the work-function layer before subsequent gate electrode deposition. This preliminary action prevents seams from propagating into the final gate electrode structure, resolving the contradiction by addressing the seam formation issue while maintaining the benefits of conformal deposition methods

Inventive Principle:
Principle #10Preliminary action

2Productivity

If feature size is reduced to improve integration density, then productivity is improved, but seam formation and fabrication issues worsen

Engineering Contradiction:
Improveintegration densityVSAvoidseam formation control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The gate stack formation process is segmented into multiple independent deposition steps: work-function layer deposition, seam-filling layer deposition, and gate electrode deposition. This segmentation allows each layer to be optimized independently, enabling high integration density while controlling seam formation through the dedicated seam-filling step

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively fills seams in the gate electrodes, improving transistor performance and reliability by ensuring seamless integration and reducing fabrication issues associated with seam formation, thereby enhancing the overall semiconductor device performance.

Implementation Method 1

depositing a silicon-containing layer to fill the seam, wherein the depositing the silicon-containing layer comprises soaking a corresponding wafer comprising the work-function layer in a silicon-containing process gas

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS11948981B2Seam-filling of metal gates with Si-containing layers
Publication Date: 2024.04.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11948981B2 patent drawing
  • US11948981B2 patent drawing
  • US11948981B2 patent drawing

AI summary

A method includes forming a dummy gate stack over a semiconductor region, forming epitaxial source/drain regions on opposite sides of the dummy gate stack, removing the dummy gate stack to form a trench, depositing a gate dielectric layer extending into the trench, and depositing a work-function layer over the gate dielectric layer. The work-function layer comprises a seam therein. A silicon-containing layer is deposited to fill the seam. A planarization process is performed to remove excess portions of the silicon-containing layer, the work-function layer, and the gate dielectric layer. Remaining portions of the silicon-containing layer, the work-function layer, and the gate dielectric layer form a gate stack.