Replacement Metal Gate CMOS Structure with Keep Cap Nitride
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor fabrication techniques face challenges in achieving improved performance and reduced power consumption in field effect transistors, particularly in maintaining a 'keep cap' metal nitride layer on PFET devices while forming N-type work function metal on NFET devices within CMOS structures, which affects device reliability and switching speed.
Innovation Solution
A method involving the formation of a semiconductor structure with interfacial dielectric layers, sacrificial rare earth oxide layers, and specific metal nitride layers to maintain a 'keep cap' metal nitride layer on PFET devices, allowing for the selective removal of N-type work function metal and improving nitrogen penetration characteristics, thereby reducing Negative Bias Temperature Instability (NBTI) and gate resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal nitride layer is maintained on PFET devices while forming N-type work function metal on NFET devices, then device reliability and switching speed are improved, but nitrogen penetration occurs leading to Negative Bias Temperature Instability
Solution Approach 1:
The patent segments the gate structure into distinct regions: NFET regions with N-type work function metal layers and PFET regions with maintained metal nitride keep cap layers. This spatial segmentation allows each transistor type to have optimized gate materials while preventing nitrogen penetration issues from affecting the entire device structure uniformly.
Solution Approach 2:
The patent applies local quality by providing different gate structures to different regions: N-type work function metals (such as tungsten, molybdenum, or their nitrides) are formed specifically in NFET regions to improve switching speed and reliability, while metal nitride keep cap layers are maintained in PFET regions to prevent nitrogen penetration and maintain device stability.
2Speed
If N-type work function metal is formed on NFET devices, then switching speed improves, but gate resistance increases
Solution Approach 1:
The patent employs composite gate structures where N-type work function metals are combined with other materials such as titanium nitride, tantalum nitride, or aluminum nitride layers. These composite structures leverage the high electron mobility of N-type metals for fast switching while the nitride components provide low resistance and stability, achieving both speed and reliability improvements.
3Stability of the object's composition
If metal nitride keep cap layer is maintained on PFET devices, then device stability improves, but manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary action by forming the metal nitride keep cap layers on PFET regions before the selective removal and N-type work function metal deposition processes. This early establishment of the keep cap structure simplifies subsequent manufacturing steps and ensures device stability is built into the structure from the outset.
Solution Approach 2:
The metal nitride keep cap layer serves as an intermediary structure that mediates between the PFET channel and the gate electrode. It provides a stable interface that prevents nitrogen penetration while allowing the gate to function properly, thus simplifying the overall device design by eliminating the need for more complex protective structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances device reliability by reducing nitrogen penetration and improving nitrogen penetration characteristics, leading to better performance in terms of reduced NBTI and lower gate resistance, supporting faster switching speeds and lower power consumption.
Implementation Method 1
performing an anneal
Data Source
AI summary
Embodiments of the present invention provide a process that maintains a “keep cap” metal nitride layer on PFET devices within a CMOS structure. The keep cap metal nitride layer is in place while an N-type work function metal is formed on the NFET devices within the CMOS structure. A sacrificial rare earth oxide layer, such as a lanthanum oxide layer is used to facilitate removal of the n-type work function metal selective to the keep cap metal nitride layer.