Replica Cascode Bias VCO for Low Jitter and Better PSRR
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Solution Overview
Problem
Voltage-controlled oscillators (VCOs) face challenges in maintaining low jitter and meeting clock timing-jitter requirements due to low power-supply-rejection ratio (PSRR), leading to excessive phase noise and bit error-rates in communication systems.
Innovation Solution
A voltage oscillator design incorporating a voltage-to-current converter and a bias voltage generation circuit with a replica bias circuit, which generates a cascode bias voltage to regulate the output impedance and reduce noise susceptibility, thereby improving PSRR and noise performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional VCO design is used, then the circuit is simple, but the power-supply-rejection ratio is low and phase noise is high
Solution Approach 1:
The VCO circuit is segmented into distinct functional blocks: voltage-to-current converter, current-controlled oscillator, and bias voltage generation circuit. This segmentation allows each block to be optimized independently for its specific function, improving overall PSRR while maintaining manageable complexity through modular design.
Solution Approach 2:
A bias voltage generation circuit is introduced as an intermediary component between the power supply and the VCO core. This intermediary actively compensates for power supply variations by generating a corrected bias voltage, thereby improving PSRR without requiring fundamental changes to the core oscillator architecture.
2Reliability
If conventional VCO design is used, then the circuit is simple, but the output jitter is high
Solution Approach 1:
The circuit is divided into separate functional modules including voltage-to-current converter, current-controlled oscillator, and bias voltage generation circuit. This segmentation isolates noise sources and allows each module to be optimized for minimal jitter contribution, achieving low jitter output with controlled complexity.
Solution Approach 2:
The bias voltage generation circuit implements feedback mechanisms to actively counteract power supply variations and noise. By continuously monitoring and correcting bias voltages, the system maintains stable oscillator operation and minimizes output jitter despite external disturbances.
3Reliability
If conventional VCO design is used, then the circuit is simple, but the phase noise is high
Solution Approach 1:
The VCO is segmented into distinct functional blocks with dedicated noise management strategies. The bias voltage generation circuit specifically addresses phase noise by providing stable biasing, while the current-controlled oscillator section is optimized for low phase noise operation, achieving superior performance without excessive complexity.
Solution Approach 2:
The bias voltage generation circuit serves as an intermediary that isolates the core oscillator from power supply noise and disturbances. By providing a cleaned and stabilized bias voltage, this intermediary component significantly reduces phase noise in the oscillator output without requiring complex modifications to the oscillator core itself.
Data Source
AI summary
Embodiments relate to a voltage oscillator (VCO) that uses a replica bias circuit to generate a cascode bias voltage. The VCO generate an output periodic signal having a frequency and phase that is less or not susceptible to voltage swings by using a bias voltage generated in a replica bias circuit that replicates a voltage-to-current converter in the VOC. The bias voltage is generated and regulated according to a power supply voltage that supplies power to the VCO to account for voltage variations in the power supply voltage.