Replica-Biased Amplifier Circuit for Low-Noise High-Bandwidth Input

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Solution Overview

Problem

Current amplifiers require high power to operate effectively, leading to increased power consumption and noise levels that are not suitable for low-noise, high-bandwidth applications such as speech recognition piezo microphone arrays.

Innovation Solution

The amplifier design incorporates a first and second input transistor, a first and second replica transistor, and a bias transistor, along with a bias control circuit and active load, to replicate current flows and adjust input values based on detection voltage or current, achieving low noise and high bandwidth without the need for a stacked transistor structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a current-reuse amplifier stacks a plurality of transistors to form an amplifier, then current reuse efficiency is improved, but power consumption increases

Engineering Contradiction:
Improvecurrent reuse efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The amplifier is divided into separate first and second amplification paths with independent input transistors and replica transistors for each path. This segmentation allows current to be processed in parallel rather than stacked sequentially, reducing the total voltage headroom required and enabling operation at lower power consumption while maintaining current reuse efficiency through the replica transistor mechanism in each path.

Inventive Principle:
Principle #1Segmentation

2Power

If higher power is applied to the amplifier, then amplification performance is improved, but power consumption increases

Engineering Contradiction:
Improveamplification performanceVSAvoidpower consumption
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The replica transistors are configured to replicate the current flowing through the input transistors, creating a feedback mechanism that automatically adjusts the bias conditions. This feedback allows the amplifier to maintain optimal amplification performance without requiring excessive power input, as the replica transistors provide automatic leveling of the current signals.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The amplifier utilizes changes in transistor operating parameters through the replica transistor mechanism to achieve variable gain and bias conditions. By changing the operating point parameters of the input and replica transistors, the amplifier can adapt its performance characteristics without linearly increasing power consumption.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If a stacked transistor structure is used, then current reuse is improved, but noise level increases

Engineering Contradiction:
Improvecurrent reuseVSAvoidnoise level
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

By segmenting the amplifier into separate first and second paths with independent transistor pairs, the patent avoids the noise accumulation that occurs in stacked configurations. Each path processes current independently through its own input and replica transistors, preventing the noise propagation that would occur through multiple stacked stages while maintaining current reuse through the replica mechanism.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11038480B2Amplifier
Publication Date: 2021.06.15 SAMSUNG ELECTRONICS CO LTD
  • US11038480B2 patent drawing
  • US11038480B2 patent drawing
  • US11038480B2 patent drawing

AI summary

An amplifier includes: a first input transistor connected to a first input, a first output, and a power source or a ground, a second input transistor connected to a second input, a second output, and the power source or the ground; a first replica transistor connected to the first input, a detection node, and the power source or the ground; a second replica transistor connected to the second input, the detection node, and the power source or the ground; and a bias transistor connected to a bias voltage, the detection node, and the power source or the ground.