Replica Transistor Correction Circuit for SAR ADC Linearity
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Solution Overview
Problem
High frequency buck converters have short high side on-times, making traditional current sense amplifiers ineffective for measuring current across power FETs, and successive-approximation-register (SAR) ADCs struggle with non-linearity of on-resistance, leading to significant errors, especially at currents below the current limit.
Innovation Solution
A correction circuit using replica transistors biased to match the current density of high side transistors, coupled with a sample and hold circuit and differential amplifiers to level shift and adjust the differential replica voltage, providing signals to a resistor ladder of the SAR ADC to improve linearity and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a replica FET is used to measure current in the power FET, then current measurement is enabled in high frequency buck converters, but measurement precision deteriorates due to non-linearity of on-resistance
Solution Approach 1:
The correction circuit divides the current measurement range into multiple segments by using multiple replica FETs with different sizes. Each replica FET is optimized for a specific current range, allowing the circuit to segment the overall measurement task into multiple accurate sub-measurements. This resolves the non-linearity issue by ensuring that each segment operates within its optimal linear range.
Solution Approach 2:
The invention changes the physical parameters of the replica FETs by using different sizes (width-to-length ratios) to create different on-resistance characteristics. By adjusting these parameters, the circuit can compensate for the non-linearity of the power FET's on-resistance across different current ranges, thereby improving measurement precision while maintaining reliability.
2Productivity
If traditional current sense amplifiers are used, then current measurement is straightforward, but they become ineffective due to very short high side on-times
Solution Approach 1:
The replica FETs are prepared in advance with predetermined sizes and characteristics that match specific current ranges. This preliminary configuration allows the correction circuit to immediately provide accurate measurement references when the high side FET switches on, eliminating the need for traditional amplifiers to process the signal in real-time during the brief on-time.
Solution Approach 2:
The invention creates copies of the power FET in the form of replica FETs that replicate its electrical characteristics. These copies serve as reference elements that enable accurate current measurement without requiring the measurement circuitry to operate at the same high speed as the power switching, thus resolving the contradiction between productivity and precision.
Data Source
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AI summary
In one embodiment, a correction circuit comprises circuit comprises a replica transistor biased at a current density to match that of a high side transistor of an output power switch at a specific load. A sample and hold circuit is coupled to the replica transistor to sample a voltage across the replica transistor. A differential amplifier provides a level shifted differential replica voltage to a tap of a resistor ladder of a successive approximation register analog-to-digital converter in response to the sampled voltage across the replica transistor. A current source provides a current to a top of the resistor ladder.