Master-Slave CAN FD Bus with Requested Replies for LED Networks
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Solution Overview
Problem
Existing high data rate vehicle communication systems, such as those for sophisticated LED lighting systems, face challenges in achieving cost-effectiveness, robustness, and safety while relying on complex and expensive protocol controllers and accurate clock sources, leading to increased production costs incompatible with automotive industry business models.
Innovation Solution
A master-slave communication bus interface using the CAN FD protocol with differential bus wiring and cyclic redundancy check (CRC) for error detection, where slaves send data only upon request from the master, avoiding collisions and ensuring fault detection through regular data streams and fail-safe modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If complex and accurate protocol controllers using external components are used to achieve high data rate communication, then communication speed and reliability are improved, but production cost increases
Solution Approach 1:
The patent integrates the protocol controller functionality directly into the transceiver chip, merging previously separate components (protocol controller, transceiver, and LED driver) into a single integrated circuit. This consolidation eliminates the need for external components while maintaining high data rate communication capabilities, thereby reducing production costs through simplified manufacturing and assembly processes
Solution Approach 2:
The integrated transceiver chip performs multiple functions simultaneously: it handles high-speed CAN FD communication, provides LED driver functionality, and includes built-in protocol control. This multi-functional design replaces what previously required separate dedicated components, reducing bill of materials costs and simplifying the overall system architecture while maintaining communication performance
2Ease of manufacture
If single-chip technologies such as BCD technology are used for LED drivers, then cost efficiency is improved, but dependency on accurate clock source (crystal) increases
Solution Approach 1:
The patent removes the external crystal oscillator from the system by implementing an internal clock generation mechanism within the integrated transceiver chip. The accurate clock source functionality is extracted from external components and embedded directly into the chip, eliminating the need for separate crystal components while maintaining timing accuracy for BCD technology operation
Solution Approach 2:
The integrated transceiver chip acts as an intermediary that provides internal clock generation and timing functions, mediating between the BCD LED driver and the CAN FD communication protocol. This internal timing mechanism serves as a built-in mediator that eliminates external crystal dependencies while ensuring accurate operation of the single-chip BCD technology
3Reliability
If differential wiring is adopted for clock and data signals to facilitate robustness, then communication reliability is improved, but wire harness cost increases
Solution Approach 1:
The patent combines clock and data signal transmission into a single CAN FD differential bus interface, merging previously separate wiring requirements into one integrated communication channel. This consolidation maintains robust differential signaling for reliable communication while reducing the quantity of wires and harness complexity, thereby lowering wire harness costs
Data Source
AI summary
A device includes a master device, a set of slave devices and a bus. The master device is configured to transmit first messages carrying a set of operation data message portions indicative of operations for implementation by slave devices of the set of slave devices, and second messages addressed to slave devices in the set of slave devices. The second messages convey identifiers identifying respective ones of the slave devices to which the second messages are addressed requesting respective reactions towards the master device within respective expected reaction intervals. The slave devices are configured to receive the first messages transmitted from the master device, read respective operation data message portions in the set of operation data message portions, implement respective operations as a function of the respective operation data message portions read, and receive the second messages transmitted from the master device.