Requesting Agent Memory Access Optimization
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Solution Overview
Problem
Existing memory access request systems face inefficiencies due to non-uniform access timing characteristics in memory devices with hierarchical sub-structures, where requesting agents lack detailed information about the memory structure and dynamic state, making it difficult to optimize access requests without being closely coupled with the memory controller.
Innovation Solution
An apparatus and method that utilize static abstraction data to guide the selection of access requests, using abstraction data functions to derive sub-structure indication data from memory addresses, allowing requesting agents to optimize access sequences without requiring dynamic state information or close coupling with the memory controller.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If requesting agents issue access requests without detailed memory structure information, then the system complexity is reduced and ease of operation is improved, but memory access efficiency deteriorates due to inability to optimize access sequences
Solution Approach 1:
The patent introduces an intermediary component (the requesting agent with abstraction data storage and selection circuitry) that mediates between the system and memory controller. This intermediary uses static abstraction data and outstanding access requests information to intelligently select and reorder access requests, thereby improving memory access efficiency without requiring the system to be closely coupled with the memory controller or to have detailed dynamic state information.
Solution Approach 2:
The patent applies preliminary action by pre-storing static abstraction data that describes memory structure characteristics in the requesting agent. This pre-stored information enables the requesting agent to make informed decisions about access request ordering without needing real-time detailed information from the memory controller, thus improving efficiency while maintaining system independence.
2Productivity
If requesting agents are closely coupled with the memory controller to share detailed memory structure information, then memory access efficiency is improved, but device complexity increases and ease of manufacture deteriorates
Solution Approach 1:
The patent extracts the essential memory structure information needed for optimization and stores it statically in the requesting agent. By extracting only the necessary abstraction data rather than requiring full detailed information sharing between closely coupled components, the system achieves improved memory access efficiency while reducing device complexity and coupling requirements.
Solution Approach 2:
The requesting agent is designed with multi-functionality, serving both as a simple access request issuer and as an intelligent optimizer using static abstraction data. This universal design allows the same component to operate effectively whether closely coupled or loosely coupled with the memory controller, reducing overall system complexity while maintaining efficiency benefits.
3Device complexity
If the pending access requests buffer in the memory controller is of finite size, then device complexity is reduced, but memory access efficiency deteriorates due to limited reordering capability
Solution Approach 1:
The patent applies preliminary action by having the requesting agent pre-order and select access requests before they enter the memory controller's finite buffer. The selection circuitry in the requesting agent uses static abstraction data and tracks outstanding requests to intelligently sequence accesses, thereby compensating for the limited reordering capability of the small buffer and maintaining high memory access efficiency without increasing buffer size or controller complexity.
Data Source
AI summary
An apparatus and method are provided for issuing access requests to a memory controller for a memory device whose memory structure consists of a plurality of sub-structures. The apparatus has a request interface for issuing access requests to the memory controller, each access request identifying a memory address. Within the apparatus static abstraction data is stored providing an indication of one or more of the sub-structures of the memory device, and the apparatus also stores an indication of outstanding access requests issued from the request interface. Next access request selection circuitry is then arranged to select from a plurality of candidate access requests a next access request to issue from the request interface. That selection is dependent on sub-structure indication data that is derived from application of an abstraction data function, using the static abstraction data, to the memory addresses of the candidate access requests and the outstanding access requests. Such an approach enables the apparatus to provide a series of access requests to the memory controller with the aim of enabling the memory controller to perform a more optimal access sequence with regard to the memory device.