ReRAM Forming Current Limiting Circuit

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Solution Overview

Problem

Conventional resistance change memory devices face challenges with a small margin between setting and resetting voltages, leading to potential false operations and high power consumption due to excessively low resistance values after the forming operation.

Innovation Solution

A nonvolatile semiconductor memory device with a memory cell array incorporating a variable resistor and a current limiting circuit that applies a forming voltage while limiting current to prevent excessive resistance reduction, allowing for controlled transitions between high and low resistance states, thereby maintaining a stable resistance margin and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a forming operation is applied to bring the memory cell structure to a usable state, then the memory cell can change between high-resistance state and low-resistance state, but the resistance value becomes too low causing excessively high current and high power consumption

Engineering Contradiction:
Improvememory cell usabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies a forming operation with limited current before normal operation to preliminarily establish the conductive filament without creating excessive low resistance. This preliminary action prepares the memory cell for usable operation while controlling the resistance to remain within acceptable ranges, preventing the excessive current and power consumption that would occur with uncontrolled forming operations.

Inventive Principle:
Principle #10Preliminary action

2Ease of operation

If a small margin is provided between setting voltage and resetting voltage, then the memory cell can operate, but false operations such as false resetting operations may occur

Engineering Contradiction:
Improveoperation feasibilityVSAvoidoperation accuracy
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent modifies the resistance characteristics of the variable resistor through controlled forming operations, which changes the voltage-current relationship and enables a larger margin between setting and resetting voltages. By adjusting the resistance parameters during forming, the memory cell achieves both operational feasibility and reliability with reduced risk of false operations.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution ensures accurate data storage by maintaining a sufficient voltage margin between setting and resetting operations and reduces power consumption by preventing excessive current flow during the forming process.

Implementation Method 1

there is known a resistance change memory (ReRAM: Resistive RAM) that has a transition metal oxide as a recording layer and is configured to store a resistance state in a nonvolatile manner. Write of data to a memory cell is implemented by applying for a short time to a variable resistor a certain setting voltage Vset. As a result, the variable resistor changes from a high-resistance state to a low-resistance state.

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Implementation Method 2

erase of data in the memory cell MC is implemented by applying for a long time to the variable resistor in the low-resistance state subsequent to the setting operation a resetting voltage Vreset which is lower than the setting voltage Vset of a time of the setting operation. As a result, the variable resistor changes from the low-resistance state to the high-resistance state.

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Data Source

PatentUS8576606B2Nonvolatile semiconductor memory device
Publication Date: 2013.11.05 KIOXIA CORP
  • US8576606B2 patent drawing
  • US8576606B2 patent drawing
  • US8576606B2 patent drawing

AI summary

A nonvolatile semiconductor memory device according to an embodiment herein includes a memory cell array. The memory cell array includes memory cells each provided between a first line and a second line and each including a variable resistor. A control circuit applies through the first and second lines a voltage necessary for a forming operation of the memory cell. A current limiting circuit limits a value of a current flowing across the memory cell during the forming operation to a certain limit value. The control circuit repeats an operation of applying the voltage by setting the limit value to a certain value and an operation of changing the limit value from the certain value, until forming of the memory cell is achieved.