ReRAM Initialization Control Circuit Adjusts Forming Voltage
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Solution Overview
Problem
The challenge in initializing resistive RAM (ReRAM) memory devices lies in efficiently transitioning resistance change materials between low and high resistance states, as existing methods struggle to maintain consistent resistance values across all memory cells due to variations in forming conditions, leading to instability and reduced performance.
Innovation Solution
A memory device configuration that includes a control circuit to adjust the initialization conditions of resistance change elements based on the number of completed elements, using a select FET as a current limiting element and adjusting voltages to prevent excessive low resistance states, thereby stabilizing the resistance change material's transition between states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a forming operation is performed on resistance change materials in ReRAM memory cells, then the memory device can be initialized and become operational, but variations in forming conditions cause inconsistent resistance values across memory cells, leading to instability
Solution Approach 1:
The control circuit monitors the resistance state of memory cells during the forming operation and dynamically adjusts the voltage applied to subsequent cells based on the measured resistance values. This feedback mechanism ensures that variations in forming conditions are compensated, maintaining consistent resistance values across all memory cells and improving reliability.
Solution Approach 2:
The patent adjusts the voltage parameter applied during the forming operation based on the resistance state of previously formed cells. By changing the voltage parameter dynamically rather than using a fixed value, the system compensates for variations in forming conditions and achieves consistent resistance values across all memory cells, resolving the contradiction between reliability and manufacturing precision.
2Ease of operation
If voltage is applied to transition resistance change materials between low and high resistance states, then memory operation is enabled, but excessive low resistance states occur leading to instability
Solution Approach 1:
The control circuit measures the resistance value of each memory cell after forming and uses this information to adjust the voltage applied in subsequent operations. This feedback prevents excessive transitions to low resistance state by compensating for variations in cell characteristics, thereby maintaining stability while enabling memory operation.
Solution Approach 2:
The voltage applied during resistance state transitions is made dynamic rather than static. The control circuit adjusts the voltage parameter based on the resistance state of memory cells, allowing the system to adapt to variations in cell characteristics and prevent excessive low resistance states, thus maintaining reliability while enabling operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures consistent and stable resistance state transitions in ReRAM memory cells, improving the reliability and performance of the memory device by accurately controlling the forming operation and reducing variations in resistance values.
Implementation Method 1
a select FET having a select gate electrode (48), and using the semiconductor layer as a channel
Implementation Method 2
resistance change elements connected between the second conductive lines and the third conductive line respectively
Data Source
AI summary
According to one embodiment, a memory device includes a semiconductor layer connected between a first conductive line and one end of a third conductive line, resistance change elements connected between second conductive lines and the third conductive line respectively, a select FET having a select gate electrode, and using the semiconductor layer as a channel, and a control circuit changing a condition of initialization of each of non-completed elements in which the initialization is not completed among the resistance change elements based on a number of completed elements in which the initialization is completed among the resistance change elements.