ReRAM Programming Method Using Low-Current Pre-Programming

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Solution Overview

Problem

Existing ReRAM memory cell programming methods are inefficient, leading to unreasonably long programming times for large arrays due to variability in programming time among cells and limited current capacity, resulting in prolonged programming times exceeding 200 seconds for 1G bit ReRAM based FPGA arrays.

Innovation Solution

A two-stage programming method is introduced, where a low-current pre-programming pulse creates a leakage path followed by a high-current programming pulse to establish a conductive path, allowing for faster programming by optimizing current usage and reducing the number of pulses required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single high-current programming pulse is applied to program ReRAM cells, then the programming current is sufficient to form conductive paths, but the programming time becomes unreasonably long for large arrays due to current limits and cell variability

Engineering Contradiction:
Improveprogramming success rateVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The programming process is segmented into two distinct stages: a pre-programming stage with limited current to create leakage paths, and a programming stage with higher current to form complete conductive paths. This segmentation allows the system to handle cell variability more effectively while reducing overall programming time for large arrays.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A pre-programming pulse is applied before the main programming pulse to create leakage paths in the ReRAM cells. This preliminary action prepares the cells by forming initial conductive structures, which reduces the time required for the subsequent high-current programming pulse to establish complete conductive paths.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If multiple programming pulses are used to accommodate cell variability, then programming reliability improves, but the total programming time increases significantly

Engineering Contradiction:
Improveprogramming success rateVSAvoidprogramming throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The programming operation is divided into two stages with different current levels and durations. The pre-programming stage handles initial cell preparation, while the programming stage completes the conductive path formation. This segmentation improves reliability by addressing cell variability without requiring multiple full-strength programming pulses, thus maintaining higher productivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the current parameter dynamically through two distinct stages: a lower current during pre-programming and a higher current during programming. This parameter change allows the system to adapt to cell variability while optimizing the balance between reliability and productivity.

Inventive Principle:
Principle #35Parameter changes

3Speed

If high current is applied to all cells simultaneously in large arrays, then programming speed increases, but the total current consumption exceeds available current budget

Engineering Contradiction:
Improveprogramming speedVSAvoidcurrent consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The programming process is segmented into pre-programming and programming stages, with only a subset of cells programmed at full current during each stage. This segmentation allows the system to maintain high programming speed for targeted cells while keeping total current consumption within the available budget by staggered activation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

During pre-programming, only partial current is applied to prepare leakage paths, and during programming, current is applied selectively to cells that need it. This partial action approach ensures that the total current consumption remains within budget while still achieving high programming speeds for the required cells.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces whole-chip programming times by pre-conditioning cells with lower currents, enabling faster filament formation and stabilization, thereby reducing overall programming time and increasing the number of cells that can be programmed simultaneously within the current budget.

Implementation Method 1

a programming potential is applied across the two electrodes having a polarity and magnitude that causes ions from the ion source electrode to migrate into the solid electrolyte layer and form a conductive path

Methodology Applied
Scientific EffectIon migration: Electrophoresis

Implementation Method 2

ions from the ion source electrode to migrate into the solid electrolyte layer and form a conductive path between the two electrodes

Methodology Applied
Scientific EffectIon migration: Electrophoresis

Data Source

PatentUS10872661B2ReRAM programming method including low-current pre-programming for program time reduction
Publication Date: 2020.12.22 MICROSEMI SOC CORP
  • US10872661B2 patent drawing
  • US10872661B2 patent drawing
  • US10872661B2 patent drawing

AI summary

A method for programming a resistive random-access memory (ReRAM) cell includes passing a first current through the ReRAM device for a first period of time, the first current selected to create a leakage path through the ReRAM device, and after passing the first current through the ReRAM device passing a second current through the ReRAM device for a second period of time shorter than the first period of time, the second current selected to create a current path having a desired resistance through the leakage path through the ReRAM device.