ReRAM Cell Refresh Circuit for Multi-Level Data Reliability
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Solution Overview
Problem
Resistance change memory devices, such as ReRAM, face reliability issues due to disturbances during reading operations, which affect the resistive state of memory cells, leading to degradation in data storage reliability, especially when multiple value levels are stored.
Innovation Solution
A resistance change memory device with a cell array and a voltage generation circuit that applies a voltage pulse after reading to converge the resistive state of selected memory cells, using a material that changes resistance based on voltage, current, or heat, with a diode and variable resistive element configuration, and a high voltage pulse to suppress unwanted resistance value changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple value levels of cell resistance are set to increase storage density, then storage capacity is improved, but the resistive state becomes more influenceable by disturbance during access events, degrading reliability
Solution Approach 1:
The patent applies a refresh voltage pulse to the selected memory cell immediately after reading data, before the disturbance can cause significant degradation. This preliminary action resets the resistive state to its original value, preventing the accumulation of reading disturbances that would otherwise corrupt the stored data in multi-level cells
Solution Approach 2:
The patent converts the harmful reading disturbance into a beneficial refresh mechanism. By intentionally applying a controlled voltage pulse that mimics and exceeds the natural disturbance, the system actively counteracts the degradation effect, transforming the problem of reading-induced disturbance into a solution that maintains data integrity in high-density multi-level storage
2Ease of operation
If a read voltage is applied to detect the resistive state of a memory cell, then data reading is enabled, but the resistive state undergoes unwanted change, leading to data degradation
Solution Approach 1:
The patent implements a feedback mechanism where the reading operation itself triggers a corrective refresh operation. The system detects that a read operation has occurred and automatically applies a refresh voltage pulse to counteract the disturbance, creating a closed-loop system that maintains resistive state stability despite repeated read operations
Solution Approach 2:
The patent applies an anti-action voltage pulse that opposes and counteracts the reading disturbance. By applying a voltage of opposite polarity or sufficient magnitude immediately after reading, the system pre-empts and neutralizes the harmful effects of the read operation on the resistive state stability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances data storage reliability by stabilizing the resistance value of memory cells, preventing unwanted transitions and maintaining accurate data storage even after multiple read operations, especially in multi-value level storage scenarios.
Implementation Method 1
a memory cell array using as a memory cell a material which changes its resistive state in a way depending upon a voltage and a current or heat
Implementation Method 2
a voltage generation circuit which generates, after having read the data of the selected memory cell, a voltage pulse for convergence of a resistive state of the selected memory cell
Data Source
AI summary
A resistance-changing memory device has a cell array having memory cells, each of which stores as data a reversibly settable resistance value, a sense amplifier for reading data from a selected memory cell in the cell array, and a voltage generator circuit which generates, after having read data of the selected memory cell, a voltage pulse for convergence of a resistive state of this selected memory cell in accordance with the read data.