ReRAM RESET Biasing to Reduce TDDB in Unselected Transistors

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Solution Overview

Problem

The time-dependent dielectric breakdown (TDDB) in resistive random-access memory (ReRAM) cells leads to electrical leakage and potential circuit failure, particularly affecting unselected access transistors due to high voltage stress, which is not adequately addressed by existing strategies.

Innovation Solution

Applying negative voltages to the bit-line of the programmed cell and all word-lines of unprogrammed cells during RESET operations, along with reducing source line and word line voltages, to minimize stress on unselected transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high voltage is applied to ReRAM cells for programming operations, then programming effectiveness is improved, but time-dependent dielectric breakdown in unselected transistors worsens

Engineering Contradiction:
Improveprogramming effectivenessVSAvoidtransistor reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies different voltage levels to different groups of transistors based on their selection status. Selected transistors receive high voltage (e.g., 2.5V) for effective programming, while unselected transistors receive reduced voltage (e.g., 1.8V or lower) to prevent dielectric breakdown. This local differentiation of voltage quality resolves the contradiction between programming effectiveness and transistor reliability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the transistor array into selected and unselected groups, applying distinct voltage stress levels to each segment. By dividing the uniform voltage application into differentiated segments, the system achieves effective programming in selected cells while protecting unselected transistors from excessive stress that causes TDDB.

Inventive Principle:
Principle #1Segmentation

2Productivity

If voltage stress is increased on access transistors for RESET operations, then RESET programming effectiveness is improved, but dielectric breakdown in unselected transistors worsens

Engineering Contradiction:
ImproveRESET programming effectivenessVSAvoiddielectric breakdown
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent implements preliminary protective actions by applying reduced voltage to unselected transistors before they can be damaged by dielectric breakdown. During RESET operations, while selected transistors receive high voltage for effective programming, unselected transistors are pre-protected through voltage reduction, preventing the harmful dielectric breakdown effect before it can occur.

Inventive Principle:
Principle #9Preliminary anti-action

3Reliability

If larger transistors are used to withstand voltage stress, then transistor reliability is improved, but cell area increases

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidcell area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent changes the voltage parameter applied to transistors based on their selection status, allowing smaller transistors to be used throughout the array. By dynamically adjusting voltage stress rather than relying on larger transistor geometry for protection, the system maintains reliability without increasing cell area.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20260031143A1System and method for reduction of time-dependent dielectric breakdown (TDDB) of unselected transistors of a resistive random-access memory (RERAM) device
Publication Date: 2026.01.29 WEEBIT NANO LTD
  • US20260031143A1 patent drawing
  • US20260031143A1 patent drawing
  • US20260031143A1 patent drawing

AI summary

During traditional programming of resistive random-access memory (ReRAM) arrays, many ReRAM cells are unnecessarily stressed. As a result of the overstress, the time dependent dielectric breakdown (TDDB) is low. According to an embodiment, negative voltages are used on the bit-line (BL) of the cell being programmed and on the and on all word-line (WL) of cells that are not being programmed. By doing so, it is possible to use a lower WL voltage and a lower source line (SL) voltage than is used in currently implemented solutions. As a result, stress on non-selected cells, and in particular transistors of non-selected cells, is reduced, thereby reducing TDDB.