ReRAM Stopper Layer Stress Management for Line-and-Space Buckling

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The manufacturing process of ReRAM devices often experiences a buckling phenomenon in the line-and-space pattern, leading to short-circuits between word lines or bit lines due to internal stress differences between layers with varying thermal expansion coefficients.

Innovation Solution

The semiconductor storage device incorporates a stopper layer with a thermal expansion coefficient larger than the upper electrode layer, and a liner layer that cancels the orientation influence of the lower layer, adjusting internal stress through sputtering bias to maintain a compressive state at room temperature, preventing buckling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If multiple layers with different thermal expansion coefficients are stacked in the ReRAM manufacturing process, then the device structure is formed, but internal stress differences cause buckling phenomenon leading to short-circuits

Engineering Contradiction:
Improvemulti-layer structureVSAvoidshort-circuit prevention
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies parameter changes by controlling the sputtering bias voltage during stopper layer formation. By adjusting the bias voltage to a specific range (-100V to -300V), the internal stress of the stopper layer is controlled to be in a compressive state, which compensates for the tensile stress from lower layers and prevents buckling. This parameter control resolves the contradiction between forming a multi-layer structure and preventing short-circuits.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent utilizes thermal expansion differences by selecting a stopper layer material with a thermal expansion coefficient larger than the upper electrode layer. This creates a compressive stress state in the stopper layer that counteracts the tensile stress from layers with smaller thermal expansion coefficients, preventing buckling while maintaining the multi-layer device structure.

Inventive Principle:
Principle #37Thermal expansion

2Manufacturing precision

If layers with varying thermal expansion coefficients are stacked, then the ReRAM device structure is achieved, but internal stress causes buckling in line-and-space patterns

Engineering Contradiction:
Improveline-and-space pattern integrityVSAvoidinternal stress
Core Design Contradiction:
Manufacturing precisionVSStress or pressure

Solution Approach 1:

The patent applies preliminary anti-action by introducing a stopper layer specifically designed to generate compressive stress that counteracts the tensile stress from lower layers before buckling can occur. The stopper layer is formed with controlled compressive stress through sputtering bias control, creating a pre-balanced stress state that prevents line-and-space pattern buckling during subsequent manufacturing processes.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent changes the stress parameter of the stopper layer by controlling sputtering conditions, specifically the bias voltage. By setting the bias voltage to -100V to -300V, the stopper layer achieves a compressive stress state that compensates for tensile stress in the structure, thereby preventing buckling and maintaining manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

3Stability of the object's composition

If the stopper layer has a larger thermal expansion coefficient than the upper electrode layer, then internal stress is balanced, but material selection becomes more restricted

Engineering Contradiction:
Improveinternal stress balanceVSAvoidmaterial selection flexibility
Core Design Contradiction:
Stability of the object's compositionVSAdaptability or versatility

Solution Approach 1:

The patent applies thermal expansion principles by selecting stopper layer materials with larger thermal expansion coefficients than the upper electrode layer. Common materials like tungsten, molybdenum, and tungsten nitride are used because they naturally exhibit this property. This approach achieves internal stress balance while maintaining reasonable material selection flexibility within the constraints of compatible materials.

Inventive Principle:
Principle #37Thermal expansion

Solution Approach 2:

The patent applies local quality by making the stopper layer's thermal expansion coefficient specifically larger than the upper electrode layer's coefficient, while other layer materials can be selected independently. This localized property adjustment allows stress balance without restricting the overall material selection for other device components, maintaining adaptability in the broader device design.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces the occurrence of buckling and short-circuits, ensuring reliable manufacturing of ReRAM devices by managing internal stress and maintaining structural integrity.

Implementation Method 1

a stopper layer 67 which contacts an upper surface of the first liner layer 66, and is acted upon by internal stress in a compressive direction at room temperature

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

adjusting internal stress through sputtering bias

Methodology Applied
Scientific EffectSputtering: Sputtering

Data Source

PatentUS8735861B2Semiconductor storage device and method of manufacturing same
Publication Date: 2014.05.27 KIOXIA CORP
  • US8735861B2 patent drawing
  • US8735861B2 patent drawing
  • US8735861B2 patent drawing

AI summary

A semiconductor storage device according to an embodiment includes a first conductive layer, a variable resistance layer, an electrode layer, a first liner layer, a stopper layer, and a second conductive layer. The first liner layer is configured by a material having a property for canceling an influence of an orientation of a lower layer of the first liner layer, the property of the first liner layer being superior compared with that of the stopper layer. The stopper layer is acted upon by an internal stress in a compressive direction at room temperature.