Rerouting Layer for Stacked Image Sensor Pitch Translation

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Solution Overview

Problem

Stacked image sensors face challenges in achieving high readout rates and functionality per footprint area due to limitations in the arrangement of pixel and readout circuits, leading to increased spacing and reduced functionality.

Innovation Solution

A rerouting layer is introduced between conductive structure arrays with different pitches, electrically coupling them to enable high readout rates and maintain high functionality per footprint area by translating between pitches, allowing for a dense distribution of readout circuits without matching the pitch of pixel sensor blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If readout circuits are arranged directly under pixel sensor blocks with matching pitch, then signal routing is simplified, but the footprint area increases and functionality per footprint area decreases

Engineering Contradiction:
Improvesignal routing simplicityVSAvoidfootprint area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent introduces a rerouting layer that translates between different pitch dimensions, allowing readout circuits to be arranged at a different pitch than the pixel sensor blocks. This dimensional translation enables denser packing of readout circuits while maintaining proper signal routing connections, thus reducing the overall footprint area without sacrificing routing simplicity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The rerouting layer acts as an intermediary between the pixel sensor block array and the readout circuit array. It provides the necessary pitch translation and signal routing functionality, allowing the two arrays to operate at different pitches without direct alignment, thereby reducing footprint area while maintaining manufacturing ease.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If spacing between pixel blocks is increased to accommodate readout circuits, then readout circuit functionality is improved, but the footprint area increases

Engineering Contradiction:
Improvereadout circuit functionalityVSAvoidfootprint area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

By introducing the rerouting layer that operates in a different dimensional space (pitch translation layer), the patent allows readout circuits to be densely packed without requiring increased spacing between pixel blocks. This enables high readout circuit functionality while maintaining compact footprint area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If multiple readout circuits per column are implemented, then readout rate is improved, but the complexity of conductive structure arrangement increases

Engineering Contradiction:
Improvereadout rateVSAvoidconductive structure arrangement complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The rerouting layer serves as an intermediary that manages the complex conductive structure arrangements required for multiple readout circuits per column. It provides systematic pitch translation and signal routing that organizes the complexity, enabling high readout rates through multiple parallel readout circuits while keeping the conductive structure arrangement manageable.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Productivity

If readout circuits are densely distributed, then functionality per footprint area is improved, but the pitch mismatch with pixel blocks increases routing complexity

Engineering Contradiction:
Improvefunctionality per footprint areaVSAvoidrouting complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The rerouting layer introduces a dimensional transformation that bridges the pitch mismatch between densely distributed readout circuits and pixel blocks. By operating in an intermediate dimensional space, it enables dense readout circuit distribution for high functionality per footprint area while managing routing complexity through systematic pitch translation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10269854B2Rerouting method and a structure for stacked image sensors
Publication Date: 2019.04.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10269854B2 patent drawing
  • US10269854B2 patent drawing
  • US10269854B2 patent drawing

AI summary

A stacked image sensor with a rerouting layer is provided for a high readout rate and a high functionality per footprint area. A pixel chip is arranged over a logic chip. The pixel chip and the logic chip respectively comprise a pixel sensor array and a readout circuit array. A first conductive feature array is arranged under and electrically coupled to the pixel sensor array. The first conductive feature array has a first pitch. A second conductive feature array is arranged over and electrically coupled to the readout circuit array. The second conductive feature array has a second pitch different than the first pitch. The rerouting layer is arranged between the first and second conductive feature arrays. The rerouting layer electrically couples the first conductive feature array to the second conductive feature array while translating between the first and second pitches. A method for manufacturing the stacked image sensor is also provided.