Reservation Station Structural Dependency Detection
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Solution Overview
Problem
Current processor architectures face delays when executing instructions with structural dependencies due to the need for reordering and sequential retirement, particularly for long operation time instructions like floating-point operations.
Innovation Solution
An instruction execution method and device utilizing a register alias table and reservation station to indicate structural dependencies between micro-instructions, allowing the reservation station to manage execution units and ensure that succeeding micro-instructions wait for the completion of preceding ones, thereby reducing overall execution time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the reorder buffer (ROB) is used to reorder execution results and ensure sequential retirement, then instruction retirement order is maintained, but execution time delay increases for instructions with structural dependencies
Solution Approach 1:
The patent extracts the structural dependency detection and management functionality from the traditional ROB-based reordering mechanism and implements it in the reservation station. The reservation station now independently tracks structural dependencies between instructions targeting the same execution unit, allowing it to prevent premature execution of successor instructions without requiring full ROB reordering for this specific purpose. This separation reduces the time overhead associated with comprehensive ROB reordering operations.
Solution Approach 2:
The patent implements preliminary detection and marking of structural dependencies in the reservation station before instructions are dispatched to execution units. By identifying and recording structural dependency relationships in advance (when instructions are allocated to the reservation station), the system can prevent successor instructions from being executed prematurely, avoiding the need for later reordering operations and reducing execution delays.
2Productivity
If instructions are executed out-of-order by the execution unit, then processing throughput increases, but structural dependency violations occur
Solution Approach 1:
The patent implements a feedback mechanism where the reservation station continuously monitors execution unit assignments and detects structural dependencies by comparing destination registers of predecessor instructions with source registers of successor instructions. When a structural dependency is detected, the reservation station provides feedback to prevent the successor instruction from being executed until the predecessor completes, thereby maintaining correctness while allowing other independent instructions to proceed out-of-order.
Solution Approach 2:
The reservation station acts as an intermediary between the out-of-order execution units and the in-order retirement mechanism. It introduces dependency tracking and control logic that mediates the execution process, allowing execution units to operate out-of-order while ensuring that structural dependencies are respected. This intermediary layer enables both out-of-order execution benefits and structural dependency correctness to coexist.
Data Source
AI summary
An instruction execution method suitable for being executed by a processor is provided. The first processor comprises a register alias table (RAT) and a reservation station. The instruction execution method includes: a register alias table receives a first micro-instruction and a second micro-instruction and issues the first micro-instruction and the second micro-instruction to the reservation station; and the reservation station assigns one of a plurality of execution units to execute the first micro-instruction, according to the first specific message of the first micro-instruction; and the reservation station assigns one of the execution units to execute the second micro-instruction, according to the second specific message of the second micro-instruction. When the reservation station determines that the execution units assigned for the first micro-instruction and the second micro-instruction are the same, the reservation station indicates that the second micro-instruction depends on the first micro-instruction.