Reserved Bit Enforcement via Pseudo-Random Patterns
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Solution Overview
Problem
Current methods lack an effective enforcement policy for reserving bits in data stored in memory, as software can force reserved bits to zero, leading to potential data manipulation and loss of hardware-set values, compromising backward compatibility.
Innovation Solution
The processor fills reserved bits with a pseudo-random pattern including error detection bits like checksums, verifying their integrity upon loading to detect any manipulation and triggering an error if the pattern is altered.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If software forces reserved bits to zero to satisfy current enforcement policies, then backward compatibility is maintained, but hardware-set values are lost and data manipulation cannot be detected
Solution Approach 1:
The system performs preliminary actions by filling reserved bits with a pseudo-random pattern and computing a checksum before storing data in memory. This preparatory step establishes a detectable signature that will be verified later, enabling the system to detect any unauthorized modifications to reserved bits while maintaining compatibility with existing software
Solution Approach 2:
The system implements feedback by verifying the checksum of reserved bits when data is loaded from memory. If the verification fails, indicating that reserved bits have been manipulated, the system triggers an error condition. This feedback mechanism ensures data integrity without requiring changes to software behavior, thus maintaining backward compatibility
2Ease of operation
If no enforcement policy is applied to reserved bits, then software can freely manipulate them, but data integrity and error detection are compromised
Solution Approach 1:
The system applies self-service by automatically managing reserved bits through checksum verification without requiring software intervention. The hardware independently fills reserved bits with pseudo-random patterns, stores them in memory, and verifies their integrity upon loading, allowing software to operate freely while data integrity is automatically protected
Solution Approach 2:
The system changes the parameter of reserved bits from static zero-values to dynamic pseudo-random patterns with associated checksums. This transformation enables the reserved bits to carry detectable information about their intended state, allowing the system to detect manipulations while maintaining software flexibility
Data Source
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Figure 1B
Figure 2A~2C
AI summary
An apparatus and method are described for enforcement of reserved bits. For example, one embodiment of a processor comprises: a memory management unit to store a set of bits including a set of reserved bits to a system memory; reserved bit enforcement logic to generate a pseudo-random pattern in the reserved bits and an error correction code over the pseudo-random pattern prior to storing the reserved bits; the memory management unit to load the reserved bits including the pseudo-random pattern and the error correction code; the reserved bit enforcement logic to use the error correction code to determine whether the reserved bits have been modified by software; and if the reserved bits have been modified, then the processor to generate an error condition and if not modified, then the processor to continue normal execution.