Reserved Processor Core for Critical Task Execution

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Solution Overview

Problem

In storage systems with multi-core processor complexes, critical tasks often execute slowly due to sharing cache resources with non-critical tasks, leading to inefficient performance.

Innovation Solution

A reserved core is designated for critical tasks, ensuring exclusive access to clean L1 and L2 caches, prioritizing their execution over non-critical tasks and maintaining performance even when the number of non-critical tasks exceeds critical tasks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If critical tasks share cache resources with non-critical tasks, then device complexity is reduced, but execution speed of critical tasks deteriorates

Engineering Contradiction:
Improveexecution speed of critical tasksVSAvoidprocessor core allocation complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The processor complex is segmented into reserved cores dedicated to critical tasks and non-reserved cores for non-critical tasks. This segmentation isolates critical tasks from non-critical tasks, ensuring that critical tasks receive exclusive cache access and do not share resources with lower-priority tasks, thereby improving execution speed without requiring complex resource management mechanisms.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Reserved cores are assigned local quality characteristics that differentiate them from non-reserved cores. Specifically, reserved cores are configured with exclusive cache access rights and are only scheduled for critical tasks, creating a localized high-performance execution environment that prioritizes speed for critical operations while maintaining simpler overall system architecture.

Inventive Principle:
Principle #3Local quality

2Speed

If a reserved core is dedicated exclusively to critical tasks, then execution speed of critical tasks is improved, but productivity of non-critical tasks may deteriorate

Engineering Contradiction:
Improveexecution speed of critical tasksVSAvoidoverall system productivity
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The processor complex is divided into reserved and non-reserved cores, allowing critical tasks to execute on reserved cores with exclusive cache access while non-critical tasks continue to execute on non-reserved cores. This segmentation ensures that the reservation of one core does not impact the overall productivity, as non-critical tasks maintain their execution path on dedicated non-reserved cores.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of reserving all cores for critical tasks (excessive action), only a partial set of cores is reserved. This partial reservation ensures that critical tasks receive the exclusive cache access and prioritization they need for high-speed execution, while enough non-reserved cores remain available to handle non-critical tasks, thereby maintaining overall system productivity.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If multiple threads share the same core, then device complexity is reduced, but measurement precision of task prioritization deteriorates

Engineering Contradiction:
Improvetask prioritization reliabilityVSAvoidthread scheduling complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system segments execution into two distinct paths: reserved cores for critical tasks and non-reserved cores for non-critical tasks. This segmentation ensures that critical tasks receive reliable prioritization and exclusive cache access, while the scheduling complexity is managed by keeping non-critical tasks on separate cores that do not require complex prioritization mechanisms.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Reserved cores are assigned local quality characteristics including exclusive cache access rights and prioritization of critical tasks. This local quality assignment ensures reliable task prioritization for critical operations without requiring complex scheduling mechanisms across the entire processor complex, as non-reserved cores operate with simpler scheduling for non-critical tasks.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10275280B2Reserving a core of a processor complex for a critical task
Publication Date: 2019.04.30 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10275280B2 patent drawing
  • US10275280B2 patent drawing
  • US10275280B2 patent drawing

AI summary

A plurality of cores are maintained in a processor complex. A core of the plurality of cores is reserved for execution of critical tasks, wherein it is preferable to prioritize execution of critical tasks over non-critical tasks. A scheduler receives a task for scheduling in the plurality of cores. In response to determining that the task is a critical task, the task is scheduled for execution in the reserved core.