Reserved Memory Rows for DRAM Row Hammer Mitigation

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Solution Overview

Problem

Semiconductor memory devices face issues with data loss due to row hammering, where repeated access to a row of memory cells causes leakage in adjacent cells, leading to potential data loss and non-uniform processing conditions at the physical boundaries of the memory array.

Innovation Solution

Implementing reserved rows, such as dummy and buffer rows, within the memory array to mitigate row hammering effects by redirecting access operations to these reserved rows, maintaining uniform processing conditions, and preventing data loss without reducing storage capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If repeated access operations are performed on a row of memory cells, then read/write speed is improved, but data loss occurs in adjacent cells due to row hammering effects

Engineering Contradiction:
Improveread/write speedVSAvoiddata retention
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

A reserved row is introduced as an intermediary between the active memory row and adjacent memory rows. When row hammering occurs on an active row, the reserved row absorbs the leakage effects and protects adjacent rows from data loss. The reserved row acts as a buffer that mediates the harmful electromagnetic interference between rows during high-speed access operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The reserved row is pre-positioned adjacent to active memory rows before any row hammering occurs. This cushioning row is specifically designed to withstand and absorb the leakage effects of repeated access operations, providing beforehand protection to adjacent memory rows that store important data.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If reserved rows are added to the memory array, then reliability against row hammering is improved, but storage capacity is reduced

Engineering Contradiction:
Improveprotection against row hammeringVSAvoidstorage capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The reserved row is strategically positioned at specific locations within the memory array where row hammering effects are most likely to occur. Rather than uniformly distributing protection across the entire array, the reserved row provides localized quality enhancement at critical boundaries, maximizing protection efficiency while minimizing impact on overall storage capacity.

Inventive Principle:
Principle #3Local quality

3Reliability

If reserved rows are used for row-copy operations, then data loss is prevented, but processing uniformity varies at physical boundaries

Engineering Contradiction:
Improvedata loss preventionVSAvoidprocessing uniformity
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The row-copy operation creates a duplicate copy of data from an active row to the reserved row before deactivating the active row. This copying mechanism ensures data preservation while allowing the active row to be deactivated. The reserved row serves as a temporary storage location for the copied data, enabling safe row replacement operations.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS12525279B2Reserved rows for row-copy operations for semiconductor memory devices and associated methods and systems
Publication Date: 2026.01.13 MICRON TECHNOLOGY INC
  • US12525279B2 patent drawing
  • US12525279B2 patent drawing
  • US12525279B2 patent drawing

AI summary

Methods, systems, and apparatuses for memory devices (e.g., DRAM) including one or more reserved rows for row-copy operations are described. Such a memory device may include a memory array having a set of rows, where one or more rows of the set are reserved for row-copy operations and hidden (un-addressable) from access commands directed to the memory array. The reserved rows may include a dummy row configured to provide a uniform processing conditions to the memory array. Additionally, or alternatively, the reserved rows may include a buffer row configured to provide a buffer zone in the memory array. In some embodiments, the memory device may perform the row-copy operations in response to detecting row hammering activities. The row-copy operations may mitigate the risks associated with the row hammering activities by routing the row hammering activities to the reserved rows.