Microprocessor Reset Diversion Circuit for Secure Data Erasure
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Solution Overview
Problem
Existing microprocessors face security risks during resets, as external resets can compromise sensitive information stored in vulnerable storage areas, potentially allowing malicious access to memory and registers, especially in scenarios where security measures are not in place after a reset.
Innovation Solution
A microprocessor with a reset diversion circuit that can be selectively enabled in secure mode to divert external reset requests to a software interrupt, triggering a secured system clean-up routine to erase sensitive information before allowing a hardware reset, thereby preventing unauthorized access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If external reset requests are allowed to trigger immediate hardware reset, then system responsiveness and simplicity are improved, but security of sensitive information stored in memory is compromised
Solution Approach 1:
A reset diversion circuit is introduced as an intermediary component between the reset port and the hardware reset mechanism. This circuit selectively intercepts external reset requests and diverts them to software interrupt handlers, which then execute secure cleanup routines before allowing the reset to proceed. This mediator enables the system to maintain both responsiveness (by quickly handling reset requests) and security (by executing cleanup routines that erase sensitive data before reset)
Solution Approach 2:
The system performs preliminary secure cleanup actions before the actual hardware reset occurs. When a reset request is received, the diversion circuit triggers software interrupt handlers that execute cleanup routines to erase sensitive information from memory and registers before the reset state machine transitions to the reset state. This preliminary action ensures security is maintained while preserving system responsiveness
2Object-affected harmful factors
If reset diversion circuit is enabled to protect sensitive data, then security is improved, but device complexity increases
Solution Approach 1:
The reset diversion circuit is designed to serve multiple functions: it can selectively divert reset requests based on the current state of the reset state machine, it can trigger software interrupt handlers, and it can work with existing security mechanisms. This multi-functionality allows the circuit to provide comprehensive security protection without requiring entirely separate dedicated components for each function, thereby limiting the increase in device complexity
3Loss of time
If immediate hardware reset is performed, then system recovery time is reduced, but sensitive information may be exposed
Solution Approach 1:
The system executes preliminary secure cleanup routines through software interrupt handlers before the hardware reset actually occurs. These routines erase sensitive information from memory and registers in advance, ensuring that even though there is a brief delay before reset, the security risk of data exposure is eliminated. The cleanup actions are performed quickly enough to minimize the impact on overall system recovery time
Data Source
AI summary
A method and apparatus for protecting access to sensitive information stored in vulnerable storage areas (e.g., public memory, registers, cache) of a microprocessor. A microprocessor having a reset port to receive external reset commands may have a reset diversion circuit that may be selectively enabled. The microprocessor may operate in an open mode or a secure mode, indicating the absence or the potential presence, respectively, of sensitive information in the vulnerable storage areas. In open mode, the reset diversion circuit may be disabled such that external reset requests triggers a hardware reset. In secure mode, sensitive information may be recorded on vulnerable storage areas. The reset diversion circuit may be enabled to divert external reset requests to an interrupt which may trigger execution of a software code. The software code, when executed, may perform a secured system clean-up routine to erase the vulnerable storage areas prior to reset.


