Power-On Reset Hysteresis Circuit for Low-Voltage Accuracy

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Solution Overview

Problem

Power-on reset circuits face challenges in accurately detecting voltage levels at low operating voltages while minimizing power consumption, especially as integrated circuits shrink and become more temperature sensitive, requiring improved accuracy and reduced current draw.

Innovation Solution

The implementation of a power-on reset device using bi-polar CMOS devices to generate reference and input voltages, with a comparison module and hysteresis control, along with under-voltage protection, to ensure precise voltage level detection and minimal power consumption, even in low voltage environments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the operating voltage is reduced to manage thermal or battery powered operating budgets, then power consumption is reduced, but the voltage margin for accurate voltage level detection is reduced

Engineering Contradiction:
Improvepower consumptionVSAvoidvoltage level detection accuracy
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The patent uses BiCMOS devices to generate reference and input voltages with precisely controlled temperature coefficients, allowing the POR circuit to maintain accurate voltage level detection even when operating at reduced supply voltages. The temperature coefficient matching ensures that the trip point remains stable and predictable across temperature variations, resolving the contradiction between low power consumption and measurement precision.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If the circuit is made more temperature sensitive to detect voltage changes accurately, then voltage level detection accuracy is improved, but temperature sensitivity increases causing instability

Engineering Contradiction:
Improvevoltage level detection accuracyVSAvoidtemperature stability
Core Design Contradiction:
Measurement precisionVSStability of the object's composition

Solution Approach 1:

The patent employs temperature coefficient matching where the reference voltage and input voltage are designed to have proportional temperature coefficients. This creates a counterbalancing effect where temperature-induced drifts in one voltage are compensated by corresponding drifts in the other voltage, maintaining stable and accurate trip point detection across temperature variations.

Inventive Principle:
Principle #8Anti-weight (Counterweight)

3Measurement precision

If the POR circuit draws more current to improve voltage detection accuracy, then measurement precision is improved, but power consumption increases

Engineering Contradiction:
Improvevoltage level detection accuracyVSAvoidcurrent draw
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The POR circuit uses the supply voltage itself to generate the reference and input voltages through BiCMOS devices, eliminating the need for separate high-current reference voltage sources. The circuit monitors its own supply voltage and generates the necessary comparison voltages internally, achieving accurate detection with minimal additional current draw.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7876135B2Power-on reset circuit
Publication Date: 2011.01.25 SILICON LABORATORIES INC
  • US7876135B2 patent drawing
  • US7876135B2 patent drawing
  • US7876135B2 patent drawing

AI summary

A power-on reset circuit produces a reset signal output configured by an upper trip-point in an input hysteresis characteristic of the circuit. The upper trip-point is configured by resistances of a first pair of resistors coupled in series at an internal voltage reference node. A temperature coefficient of the upper trip-point is configured by resistance values of a second pair of resistors where each resistor is coupled with a corresponding switching device with an associated switching threshold. A magnitude of the input hysteresis characteristic is configured by resistances of a third pair of resistors in series. The magnitude of hysteresis is configured independent of configuring either the level or the temperature coefficient of the upper trip-point.