Reset IC CMOS Output for Multi-Supply Reset Without Dark Current

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Solution Overview

Problem

Conventional reset ICs face issues with dark current flow during low-level output, limiting battery life in systems with multiple power supplies and requiring additional level shift circuits for signal compatibility.

Innovation Solution

A reset semiconductor integrated circuit with a CMOS output stage and additional external terminal for power supply, allowing it to generate and output a reset signal suitable for devices with multiple power supplies without dark current flow and eliminating the need for level shift circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If open drain output is used with pull-up resistor, then reset signal level can be adapted for multi-power supply systems, but dark current flows through pull-up resistor causing battery life to shorten

Engineering Contradiction:

Improvereset signal interface compatibilityVSAvoidbattery usage time

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts and eliminates the pull-up resistor from the system by using a CMOS output stage that can actively drive both high and low logic levels. The CMOS output circuit generates the reset signal directly without requiring an external pull-up resistor, thereby removing the source of dark current leakage while maintaining the ability to provide proper logic levels for multi-power supply systems.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the output stage configuration from open drain to CMOS output. This parameter change enables the output to actively drive both high and low states, eliminating the need for pull-up resistors and the associated dark current leakage, while still providing voltage level adaptation for systems with multiple power supplies.

Inventive Principle:

Principle #35Parameter changes

2Speed

If pull-up resistor is used to drive input impedance, then signal rise speed is maintained, but dark current flows causing energy loss

Engineering Contradiction:

Improvesignal rise speedVSAvoiddark current energy loss

Core Design Contradiction:

SpeedVSLoss of energy

Solution Approach 1:

The patent removes the pull-up resistor from the circuit by implementing a CMOS output stage that actively drives the output signal. The CMOS output can source current to quickly rise the signal level without requiring a pull-up resistor, thereby eliminating dark current leakage while maintaining fast signal rise times.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The CMOS output stage is self-sufficient in driving the output signal. It can actively source current during high state transitions, eliminating the need for external pull-up resistors. The output circuit serves its own driving function without relying on passive components that cause energy loss.

Inventive Principle:

Principle #25Self-service

3Loss of energy

If CMOS output is used, then dark current does not flow, but devices are limited to single power supply operation

Engineering Contradiction:

Improvedark current eliminationVSAvoidmulti-power supply compatibility

Core Design Contradiction:

Loss of energyVSAdaptability or versatility

Solution Approach 1:

The patent implements a CMOS output stage that provides universal compatibility with both single and multi-power supply systems. The output circuit can operate with a single power supply or be adapted to multi-power supply configurations, eliminating dark current while maintaining versatility across different system architectures.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Adaptability or versatility

If level shift circuit is added for multi-power supply compatibility, then signal level adaptation is achieved, but device complexity and cost increase

Engineering Contradiction:

Improvemulti-power supply interface compatibilityVSAvoidcircuit complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the level shifting function into the CMOS output stage itself. The output circuit is designed to directly generate reset signals at appropriate voltage levels for multi-power supply systems, eliminating the need for separate level shift circuits and reducing overall system complexity.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS12388437B2Reset semiconductor integrated circuit and electronic circuit system using the same

Publication Date: 2025.08.12 MITSUMI ELECTRIC CO LTD

AI summary

Disclosed is a reset semiconductor integrated circuit that outputs a reset signal in response to a power supply voltage of a monitoring target becoming lower than a predetermined level, the reset semiconductor integrated circuit including: a voltage detection circuit; an output stage including a CMOS circuit that generates and outputs a signal according to a detection result of the voltage detection circuit; a monitored voltage input terminal to which the power supply voltage of the monitoring target is input; a reference potential terminal to which a voltage as a reference potential of a circuit is applied; an external voltage terminal which is connected to a power supply voltage terminal of the output stage to allow a power supply voltage as an operation voltage of the output stage to be applied from outside; and an output terminal to output the signal generated by the output stage.