Reset Pulse Encoding for IC Recovery Without Internal Clock
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Solution Overview
Problem
Integrated circuits (ICs) without a dedicated reset input face challenges in recovery from errors, as existing methods like power cycling are time-consuming, and alternative approaches like using a chip select line may not be robust enough.
Innovation Solution
A method involving a controller sending a specific sequence of signal transitions in a data signal and clock signal to reset ICs without a separate reset input, allowing for partial or complete software and hardware resets, with the ability to redefine the reset command sequence if initial attempts fail.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power cycling is used to reset IC without reset input, then reset function is achieved, but recovery time becomes significant
Solution Approach 1:
The patent uses an intermediary encoding scheme where reset commands are transmitted through existing data and clock signal lines. Instead of directly applying power cycling or using dedicated reset lines, the reset function is mediated through encoded signal sequences that trigger internal reset mechanisms, thereby achieving reset without time-consuming power cycles.
Solution Approach 2:
The patent replaces the mechanical/electrical action of power cycling with a signal-based encoding approach. By substituting the physical power cycle mechanism with encoded data and clock signal sequences, the system achieves reset functionality through software-controlled signal patterns rather than hardware-level power manipulation.
2Loss of time
If chip select line is used for reset, then recovery time is reduced, but robustness of reset mechanism is insufficient
Solution Approach 1:
The patent segments the reset command into multiple distinct signal transitions within the encoded data sequence. Instead of relying on a single chip select line assertion, the reset function is divided into multiple encoded transitions that must occur in sequence, creating a more robust and verifiable reset mechanism that can be reliably detected and executed.
Solution Approach 2:
The patent changes the parameters of the signal encoding by using specific patterns of transitions in both data and clock signals. By modifying the temporal and logical parameters of the signal sequences, the system creates a distinctive encoded reset command that is more robust against noise and interference compared to simple chip select line usage.
3Reliability
If encoded signal sequence is used for reset, then reset robustness is improved, but device complexity increases
Solution Approach 1:
The patent implements a universal encoding scheme that can represent multiple commands (normal operation, reset, redefinition) using the same data and clock signal infrastructure. This multi-functional approach allows the system to achieve robust reset capability without adding dedicated hardware lines, as the existing bidirectional interface is used for multiple purposes through encoding differentiation.
Data Source
AI summary
An integrated circuit (IC) provides a reset function. The IC receives a command that is defined by a first sequence of counts of signal transitions of a first signal during windows of a second signal and provides a reset function when it is determined that the command is received. A device including the IC and a system including the device are provided.