Reset Release Inhibit Circuit for Stable Power-On Timing
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Solution Overview
Problem
Existing reset circuits may prematurely release the reset signal due to differences in the slope of rise between the power supply voltage and the reference voltage, leading to unstable initial operations of integrated circuits.
Innovation Solution
A reset circuit design that includes an output circuit for releasing the reset signal when a first voltage reaches a target level and an inhibit circuit to prevent premature output until the power supply voltage reaches a stable level, ensuring the reset signal is only released when the power supply voltage is fully stable.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a reset circuit compares a divided voltage obtained by dividing a power supply voltage with a reference voltage to determine when the power supply voltage has stabilized, then the reset release can be triggered based on voltage comparison, but the divided voltage may exceed the reference voltage even before the power supply voltage reaches a stable voltage due to differences in slope of rise, causing premature reset release and malfunction
Solution Approach 1:
The patent applies preliminary action by setting a predetermined voltage level threshold before the actual voltage comparison occurs. The inhibit circuit pre-establishes a voltage threshold that must be exceeded before the reset release signal can be output, preventing premature activation due to transient voltage fluctuations during the power-on ramp-up phase.
Solution Approach 2:
The patent introduces an intermediary inhibit circuit between the voltage comparison mechanism and the reset release output. This inhibit circuit acts as a mediator that filters out premature voltage exceedances by requiring the power supply voltage to reach a predetermined higher level before allowing the reset release signal to pass through, thus resolving the contradiction between early detection and accurate timing.
2Productivity
If the reset release signal is output as soon as the divided voltage reaches the reference voltage, then the reset can be released quickly, but this may cause malfunction because the power supply voltage has not reached a stable voltage
Solution Approach 1:
The inhibit circuit performs preliminary action by establishing a predetermined voltage level threshold that must be reached before reset release is permitted. This ensures that the power supply voltage has stabilized sufficiently before the reset release signal is output, maintaining operation stability while still enabling relatively quick reset release once the threshold is met.
Solution Approach 2:
The patent changes the voltage parameter threshold from a simple reference voltage comparison to a predetermined higher voltage level. By adjusting this voltage parameter, the system balances between quick reset release (lower threshold) and operation stability (higher threshold), optimizing both productivity and reliability.
Data Source
AI summary
A reset circuit includes: an output circuit that outputs a reset release signal for releasing reset of a reset target circuit that is to be applied with a power supply voltage, when a first voltage that rises with a rise in the power supply voltage reaches a first reference voltage that rises with a rise in the power supply voltage until the first reference voltage reaches a target level; and an inhibit circuit that inhibits the reset release signal from being output to the reset target circuit until the power supply voltage reaches a third level, the third level being higher than a first level at a time when the first reference voltage exceeds the first voltage, the third level being lower than a second level at a time when the first voltage reaches the target level.