Reset Sequencing Logic for Power Distribution Network Noise Reduction

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Solution Overview

Problem

Integrated circuit devices face power distribution noise issues due to simultaneous dynamic events among circuitry components sharing a power distribution network, leading to voltage transients that can cause circuit errors or failures.

Innovation Solution

Implementing reset sequencing logic through control logic that schedules or staggers dynamic events, such as resets and reconfigurations, to prevent simultaneous power draws, thereby reducing noise in the power distribution network.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple circuitry components perform dynamic events (reset, reconfiguration) simultaneously to improve operational efficiency, then productivity is improved, but power distribution noise increases causing voltage transients and circuit errors

Engineering Contradiction:

Improveoperational efficiencyVSAvoidpower distribution noise

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

The control logic proactively schedules and sequences dynamic events before they occur, preventing simultaneous power draws by staggering reset and reconfiguration operations across different time intervals, thereby reducing voltage transients while maintaining operational efficiency

Inventive Principle:

Principle #10Preliminary action

2Device complexity

If simultaneous dynamic events are allowed across multiple circuitry components, then device complexity is reduced, but reliability deteriorates due to cumulative voltage transients causing circuit errors or failures

Engineering Contradiction:

Improvecontrol logic complexityVSAvoidcircuit operation reliability

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

A control logic intermediary is introduced between the circuitry components and the power distribution network to monitor and sequence dynamic events, ensuring that reset and reconfiguration operations are staggered to prevent cumulative voltage transients, thereby improving circuit operation reliability without significantly increasing overall device complexity

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS10242141B2Reset sequencing for reducing noise on a power distribution network

Publication Date: 2019.03.26 ALTERA CORP

AI summary

A computer-implemented method includes receiving a first circuit design for an integrated circuit device, determining when multiple power-drawing events are to occur at substantially the same time via one or more circuitry components of the integrated circuit device, which would have a disruptive effect on a power distribution network of the integrated circuit device, based on the first circuit design, and generating logic that schedules the more than one event so that the more than one event do not occur simultaneously. The logic is included in an event sequencer. The method also includes inserting the event sequencer into the first circuit design during compilation to create a second circuit design and outputting the second circuit design to be implemented on the integrated circuit device.